Intel E7520 user manual Debug Procedure, Level 1 Debug Port80/BIOS, Level 2 Debug Power Sequence

Dual-Core Intel Xeon processor LV / E7520 Chipset / 6300ESB ICH

8.0Debug Procedure

The debug procedure in this section is used to determine baseline functionality for the Dual-Core Intel® Xeon® processor LV with Intel® E7520 Chipset and Intel® 6300ESB ICH Development Kit. This is a cursory set of tests designed to provide a level of confidence in the platform operation.

8.1Level 1 Debug (Port80/BIOS)

Refer to the steps in Table 23 when debugging a board that does not boot.

Table 23.	Level 1 Debug (Port80/BIOS)
	Step	Test	Pass/Fail Criteria	Cause of Failure
	1	Verify “SYSTEM PWRGD” LED	Green	Power sequence failure – go
				immediately to Level 2 debug
	2	Is “PCI Reset” LED illuminated?	Decimal on Port 80 display	PCI reset stuck – go to Level 3 debug
			RED
	3	Verify CPURST LED is off	Off	CPU reset stuck – go to Level 3
				debug
			Port 80 LEDs are posting	System Hang – Check BIOS go to
	4	Verify Port 80 posting		level 3 debug. Refer to AMI* BIOS
			boot codes and stopping
				documentation for details.
	5	Verify BIOS settings	Latest BIOS installed	Contact Intel representative for the
				latest BIOS image
	6	Verify default jumper settings	See default settings	Improper jumper settings

8.2Level 2 Debug (Power Sequence)

Table 24.	Level 2 Debug (Power Sequence)
	Step	Test	Pass/Fail Criteria	Cause of Failure
			Measure voltages across:
			3.3V
	1	Primary power supply voltages	-12V	External power supply failure
			5V
			5V
			12V
	2	1.8V	1.8V	DDR2 power supply failure
	3	1.5V	1.5V	MCH/ICH core power supply failure
	4	1.8V VSBY	1.8V	DDR2 standby power supply failure
	5	CPU VTT Power Supply	1.05V	CPU_VTT power supply failure
	6	CPU0 VRD	1.2V – 1.4V	CPU0 VRD failure
	7	CPU1 VRD	1.2V – 1.4V	CPU1 VRD failure
	8	Verify “SYSTEM PWRGD” LED	Green	Power sequence failure

	Dual-Core Intel® Xeon® processor LV with Intel® E7520 Chipset and Intel® 6300ESB ICH
April 2007	User’s Manual
Order Number: 311274-009	57