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Intel IQ80219 manual B.9.3 Exceptions/Trapping, Getting Started and Debugger

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Intel® IQ80219 General Purpose PCI Processor Evaluation Platform

Getting Started and Debugger

B.9.3 Exceptions/Trapping

A debug exception causes the processor to re-direct execution to a debug event handling routine.

The Intel® 80200 processor debug architecture defines the following debug exceptions:

•instruction breakpoint

•data breakpoint

•software breakpoint

•external debug break

•exception vector trap

•trace-buffer full break

When a debug exception occurs, the processor actions depend on whether the debug unit is configured for Halt mode or Monitor mode.

Board Manual

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Intel manual B.9.3 Exceptions/Trapping, Intel IQ80219 General Purpose PCI Processor Evaluation Platform

Contents

Intel IQ80219 General Purpose PCI Processor Evaluation Platform Board ManualNovember Board Manual Intel IQ80219 General Purpose PCI Processor Evaluation PlatformContents Contents3.7.4 ContentsContents Contents Contents Contents FiguresIntel IQ80219 General Purpose PCI Processor Evaluation Platform Intel IQ80219 General Purpose PCI Processor Evaluation Platform TablesContents Intel 80219 General Purpose PCI Processor Related Documentation ListIntel IQ80310 and Intel IQ80219 evaluation platform board Comparisons ContentsIntel IQ80219 General Purpose PCI Processor Evaluation Platform Board Manual Revision HistoryContents Intel IQ80219 General Purpose PCI Processor Evaluation PlatformContents This Page Left Intentionally BlankIntel IQ80219 General Purpose PCI Processor Evaluation Platform Intel 80219 General Purpose PCI Processor Related Documentation List Introduction1.1 Document Purpose and Scope 1.2 Related DocumentsIntroduction 1.3 Electronic Information1.4 Component References Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntroduction 1.5 Terms and DefinitionsTerms and Definitions Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntroduction Figure 1. Intel 80219 General Purpose PCI Processor Block Diagram1.6 Intel 80219 General Purpose PCI Processor Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform The 80219 includes eight General Purpose I/O GPIO pinsIntroduction Introduction 1.7 Intel IQ80219 Evaluation Platform Board FeaturesSummary of Features Intel IQ80219 General Purpose PCI Processor Evaluation Platform2.2.2 Power and Backplane Requirements 2.1 Kit Content2.2 Hardware Installation 2.2.1 First-Time Installation and Test2.4.1 Supported Tool Buckets 2.3 Factory Settings2.4.2 Contents of the Flash 2.4 Development StrategyGetting Started 2.5.1 Redhat Redboot2.5 Target Monitors Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform 2.5.2 ARM Firmware SuiteGetting Started Getting Started 2.5.2.1 ARM Angel2.5.2.1.1 Semihosting File I/O Intel IQ80219 General Purpose PCI Processor Evaluation PlatformFigure 2. Serial-UART Communication 2.6 Host Communications Examples2.6.1 Serial-UART Communication 2.6.2 Ethernet-Network CommunicationGetting Started 2.6.3 JTAG Debug CommunicationFigure 4. JTAG Debug Communication Intel IQ80219 General Purpose PCI Processor Evaluation PlatformGetting Started 2.6.4.1 Communicating with Redboot2.6.4 GNUPro GDB/Insight Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform HyperTerminal setup screens “Connection Description” Panel Enter nameGetting Started GDB target remote /dev/ttyS0 2.6.4.2 Connecting with GDBxscale-elf-gdb -nw hello1 GDB set remotebaudIntel IQ80219 General Purpose PCI Processor Evaluation Platform 2.6.5 ARM Extended DebuggerGetting Started Board Manual This Page Left Intentionally BlankIntel IQ80219 General Purpose PCI Processor Evaluation Platform Getting StartedSwitch 3.1 Functional DiagramFigure 5. Functional Block Diagram Hardware Reference SectionFigure 6. Board Form Factor Table 6. Form-Factor/Connectivity Features3.2 Board Form-Factor/Connectivity Hardware Reference SectionHardware Reference Section 3.3 PowerPower Features Intel IQ80219 General Purpose PCI Processor Evaluation Platform3.4.1 DDR SDRAM 3.4.1.1 Battery BackupTable 8. DDR Memory Features 3.4 Memory SubsystemHardware Reference Section 3.4.2 Flash Memory RequirementsTable 10. Flash Memory Requirements Intel IQ80219 General Purpose PCI Processor Evaluation PlatformPlease refer to user switches section for mode setting during reset 3.5 Intel 80219 General Purpose PCI Processor Operation ModeBoard Manual Board Manual 3.6 Interrupt RoutingIntel IQ80219 General Purpose PCI Processor Evaluation Platform Hardware Reference SectionBattery Table 11. Peripheral Bus Features3.7 Intel IQ80219 Evaluation Platform Board Peripheral Bus Intel IQ80219 Evaluation Platform Board Peripheral Bus TopologyIntel Table 12. Flash ROM Features3.7.1 Flash ROM Figure 9. Flash Connection on Peripheral BusIntel IQ80219 General Purpose PCI Processor Evaluation Platform Table 13. UART Features3.7.2 UART Figure 10. UART Connection on the Peripheral BusIntel IQ80219 General Purpose PCI Processor Evaluation Platform 3.7.3 HEX DisplayTable 14. HEX Display on the Peripheral Bus Figure 11. HEX Display Connection on the Peripheral BusNKK DR FC Rotary Switch PBAD-3 3.7.4 Rotary SwitchTable 15. Rotary Switch Requirements Figure 12. Rotary Switch Connection on the Peripheral BusIntel IQ80219 General Purpose PCI Processor Evaluation Platform 3.7.5 Battery StatusTable 16. Battery Status Buffer Requirements Figure 13. Battery Status Buffer on Peripheral Bus3.8.2.1 Intel 82544EI Gigabit Ethernet Controller 3.8 Debug Interface3.8.1 Console Serial Port 3.8.2 Ethernet PortJTAG Port 3.8.4 Logic-Analyzer Connectors3.8.3 JTAG Debug 3.8.3.1Hardware Reference Section Micor J3F2 Signal/Pins3.8.5 Mictor J3F2 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformHardware Reference Section Micor J2F1 Signal/Pins3.8.6 Mictor J2F1 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformHardware Reference Section Micor J1C1 Signal/Pins3.8.7 Mictor J1C1 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformHardware Reference Section Micor J3C1 Signal/Pins3.8.8 Mictor J3C1 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformHardware Reference Section Micor J2C1 Signal/Pins3.8.9 Mictor J2C1 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformTo PCI-X Bridge Reset 3.9 Board Reset SchemeTable 23. Reset Requirements/Schemes Figure 15. RESET SourcesSwitch 3.10 Switches and Jumpers3.10.1 Switch Summary Switch Summary3.10.2 PCIX Initialization Summary 3.10.2.1 User Defined Switches3.10.2.2 PCI-X Bridge Initialization Signals Figure 16. PCI-X Routing Diagram on Secondary PCI-X BridgeSwitch S8E2 3.10.3 Default Switch Settings - VisualSwitch S7E1 Switch S8E13.10.6 General Purpose Input/Output Header 3.10.5 Connector SummaryConnector Summary 3.10.4 Jumper SummaryTable 35. Primary PCI/PCI-X Operation Settings 3.10.7 Secondary PCI/PCI-X Operation Settings3.10.8 Primary PCI/PCI-X Operation Settings Secondary PCI/PCI-X Operation SettingsTable 37. Switch S7E1-2 RSTMODE Settings and Operation Mode 3.10.9 Detail Descriptions of Switches/Jumpers3.10.9.1 Switch S7E1- 2/3 Switch S7E1- 2/3 General Descriptions3.10.9.2.1 Switch S7E1 3.10.9.2 Switch S7E1- 4/53.10.9.3 Switch S7E1- 6/7 Switch S7E1 - 4/5 DescriptionsSwitch 3.10.9.4 Switch S7E1Switch S7E1 - 8 Descriptions Switch S7E1 - 8 Settings and Operation ModeSwitch S8E1 - 2 Descriptions 3.10.9.5 Switch S8E13.10.9.6 Switch S8E1 3.10.9.7 Switch S8E1Switch S8E1 - 5 Settings and Operation Mode 3.10.9.8 Switch S8E13.10.9.9 Switch S8E1 3.10.9.8.1 Switch S8E1 - 5 DescriptionsSwitch S8E1 - 7 Settings and Operation Mode 3.10.9.10 Switch S8E13.10.9.11 Switch S8E1 Switch S8E1 - 7 DescriptionsSwitch S8E2 - 1/2 Settings and Operation Mode 3.10.9.12 Switch S8E2 - 1/23.10.9.13 Switch S8E2 Switch S8E2 - 1/2 DescriptionsSwitch S9E1 - 13 Settings and Operation Mode 3.10.9.14 Switch S9E13.10.9.15 Switch S9E1 Switch S9E1 - 13 DescriptionsSwitch S1D1 - 1/2 Descriptions 3.10.9.16 Switch S1D1 - 1/23.10.9.17 Switch S4D1 - 1/2 3.10.9.18 Switch S4D1 - 3/43.10.9.19 Jumper J1G2 Jumper J1G2 Settings and Operation ModeJumper J3E1 Settings and Operation Mode Jumper J3G1 Settings and Operation Mode3.10.9.23 Jumper J9F1 Jumper J9E1 Settings and Operation ModeJumper J9F1 Settings and Operation Mode 3.10.9.22 Jumper J9E1Board Manual This Page Left Intentionally BlankExternal RAID Section 4.1 Private Device ConfigurationTable 86. Private Device Configuration Requirements IDSEL Routing for Private Device ConfigurationTable 87. Interrupt Routing for Secondary PCI-X Private Device Figure 18. Interrupt Routing for Private Device Configuration4.2 Interrupt Routing External RAID SectionDDR Memory Bias Voltage Minimum/Maximum Values Software Reference5.1 DRAM 5.2 Components on the Peripheral BusIntel IQ80219 General Purpose PCI Processor Evaluation Platform 5.2.1 Flash ROMSoftware Reference Figure 19. Flash Connection to Peripheral BusFigure 20. UART Connection to Peripheral Bus 5.2.3 Rotary SwitchUART Register Settings 5.2.2 UARTIntel IQ80219 General Purpose PCI Processor Evaluation Platform 5.2.4 HEX DisplayFigure 21. Hex Display Connection to Peripheral Bus Figure 22. 7-Segment Display Bit DefinitionSoftware Reference Intel IQ80219 General Purpose PCI Processor Evaluation PlatformBoard Manual Intel IQ80219 General Purpose PCI Processor Evaluation Platform 5.3 EthernetSoftware Reference 80219 General Purpose PCI Processor Memory Map 5.4 Board Support Package BSP Examples5.4.1 Intel 80219 General Purpose PCI Processor Memory Map IntelSoftware Reference 5.4.2 Redboot* Intel IQ80219 Memory MapDefault Virtual Map Intel IQ80219 General Purpose PCI Processor Evaluation PlatformSoftware Reference 5.4.3 Redboot Intel IQ80219 Physical Memory Map - VisualFigure 26. Redboot Intel IQ80310 Physical Memory Map Intel IQ80219 General Purpose PCI Processor Evaluation PlatformSoftware Reference 5.4.4 Redboot Intel IQ80219 Virtual Memory Map - VisualFigure 27. Redboot Intel IQ80310 Virtual Memory Map Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform 5.4.5 Redboot Intel IQ80219 FilesSoftware Reference Intel IQ80219 General Purpose PCI Processor Evaluation Platform 5.4.6 Redboot Intel IQ80219 DDR Memory Initialization SequenceSoftware Reference Intel IQ80219 General Purpose PCI Processor Evaluation Platform 5.4.7 Redboot SwitchingS8E1-2 ON Enable GbE on the SPCI-X Bus All other switches are left in default positionsBoard Manual This Page Left Intentionally BlankIntel IQ80219 General Purpose PCI Processor Evaluation Platform Software ReferenceIntel IQ80310 and IQ80219 ComparisonsIQ80310 and Intel IQ80219 evaluation platform board Comparisons FeaturesBoard Manual This Page Left Intentionally BlankB.1.2 Necessary Hardware and Software Getting Started and DebuggerB.1 Introduction B.1.1 PurposeBoard Manual B.1.4 Related Web SitesGetting Started and Debugger B.2 SetupB.2.1 Hardware Setup Figure 28. Intel IQ80219 Hardware Setup Flow ChartGetting Started and Debugger B.2.2 Software SetupFigure 29. Software Flow Diagram Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.3 New Project SetupB.3.1 Creating a New Project a. Expand the Redhat GNU Tools for XScale itemIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.3.2 ConfigurationGetting Started and Debugger Getting Started and Debugger B.4 Flashing with JTAGB.4.1 Overview Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.4.2 Using Flash ProgrammerGetting Started and Debugger Getting Started and Debugger B.5 Debugging Out of FlashB.6 Building an Executable File From Example Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.7.1 Launching and Configuring DebuggerB.7 Running the CodeLab Debugger b. hit BrowseGetting Started and Debugger B.7.2 Manually Loading and Executing an Application ProgramB.7.3 Displaying Source Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.7.4 Using BreakpointsGetting Started and Debugger Getting Started and Debugger B.7.6 Setting CodeLab Debug OptionsB.7.5 Stepping Through the Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformB.8.3 Source Code B.8 Exploring the CodeLab Debug WindowsB.8.1 Toolbar Icons B.8.2 Workspace WindowIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.8.6 Registers WindowB.8.7 Watch Window B.8.8 Variables WindowB.9.2.1 Software Breakpoints B.9 Debugging BasicsB.9.1 Overview B.9.2 Hardware and Software BreakpointsIntel IQ80219 General Purpose PCI Processor Evaluation Platform B.9.3 Exceptions/TrappingGetting Started and Debugger Board Manual This Page Left Intentionally BlankC.1.3 C.1 IntroductionC.1.1 Purpose C.1.2 Necessary Hardware and SoftwareBoard Manual C.1.4 Related Web SitesIntel IQ80219 General Purpose PCI Processor Evaluation Platform C.2 SetupC.2.1 Hardware Setup Figure 30. Intel IQ80219 Hardware Setup Flow ChartGetting Started and Debugger C.2.2 Software SetupFigure 31. Software Flow Diagram Intel IQ80219 General Purpose PCI Processor Evaluation PlatformGetting Started and Debugger C.3 New Project SetupC.3.1 Creating a New Project Intel IQ80219 General Purpose PCI Processor Evaluation PlatformGetting Started and Debugger ConfigurationC.3.2 Intel IQ80219 General Purpose PCI Processor Evaluation PlatformGetting Started and Debugger C.4 Flashing with JTAGC.4.1 Overview Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform C.4.2 Using Flash ProgrammerGetting Started and Debugger Getting Started and Debugger C.5 Debugging Out of FlashC.6 Building an Executable File From Example Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformIntel IQ80219 General Purpose PCI Processor Evaluation Platform C.7.1 Launching and Configuring DebuggerC.7 Running the CodeLab Debugger C.7.2 Manually Loading and Executing an Application ProgramGetting Started and Debugger C.7.4 Using BreakpointsC.7.3 Displaying Source Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformGetting Started and Debugger C.7.6 Setting CodeLab Debug OptionsC.7.5 Stepping Through the Code Intel IQ80219 General Purpose PCI Processor Evaluation PlatformC.8.3 Source Code C.8 Exploring the CodeLab Debug WindowsC.8.1 Toolbar Icons C.8.2 Workspace WindowIntel IQ80219 General Purpose PCI Processor Evaluation Platform C.8.6 Registers WindowC.8.7 Watch Window C.8.8 Variables WindowC.9.2.1 Software Breakpoints C.9 Debugging BasicsC.9.1 Overview C.9.2 Hardware and Software BreakpointsIntel IQ80219 General Purpose PCI Processor Evaluation Platform C.9.3 C.9.3 Exceptions/TrappingGetting Started and Debugger