Hardware Reference Manual 125
Intel® IXP2800 Network Processor
Intel XScale® Core
3.11 Intel XScale® Core Gasket Unit

3.11.1 Overview

The Intel XScale® core uses the Core Memory Bus (CMB) to communicate with the functional

blocks. The rest of the IXP2800 Network Processor functional blocks use the Command Push Pull

(CPP) as the global bus to pass data. Therefore, the gasket is needed to translate Core Memory Bus

commands to Command Push Pull commands.

This gasket has a set of local CSRs, including interrupt registers. These registers can be accessed

by the Intel XScale® core via the gasket internal bus.The CSR Access Proxy (CAP) is only allowed

to do a set on these interrupt registers.

Figure 26. Intel XScale® Core-Initiated Write to the IXP2800 Network Processor (Continued)

A9696-03
Byte 1
Write
M[7:0]
M[15:8]
M[23:16]
M[31:24]
X [7:0]
X_BE [0]
X [15:8]
X [23:18]
X [31:24]
Word Write by Intel XScale® Core Intel® IXP2800
Network Processor
Intel® IXP2800
Network Processor
X_BE [1]
X_BE [2]
X_BE [3]
Byte 0
Write
Word 0Word 1
Byte 1
Write
Byte 2
Write
Byte 3
Write
M[7:0]
M[15:8]
M[23:16]
M[31:24]
X [7:0]
X_BE [0]
X [15:8]
X [23:18]
X [31:24]
Long Word (32 bits)Write by Intel XScale® Core
X_BE [1]
X_BE [2]
X_BE [3]
Byte 0
Write