38 Hardware Reference Manual
Intel® IXP2800 Network Processor
Technical Description
methods to write TRANSFER_IN registers, for example a read instruction executed by one
Microengine may cause the data to be returned to a different Microengine. Details are covered in
the instruction set descriptions).
TRANSFER_OUT registers, when used as a destination in an instruction, are written with the
result from the execution datapath. The specific register selected is encoded in the instruction, or
selected indirectly via T_INDEX. TRANSFER_OUT registers supply data to external units
(for example, write data for an SRAM write).
The S_TRANSFER_IN and S_TRANSFER_OUT registers connect to the S_PUSH and S_PULL
buses, respectively.
The D_TRANSFER_IN and D_TRANSFER_OUT Transfer registers connect to the D_PUSH and
D_PULL buses, respectively.
Typically, the external units access the Transfer registers in response to instructions executed by the
Microengines. However, it is possible for an external unit to access a given Microengine’s Transfer
registers either autonomously, or under control of a different Microengine, or the Intel XScale®
core, etc. The Microengine interface signals controlling writing/reading of the TRANSFER_IN
and TRANSFER_OUT registers are independent of the operation of the rest of the Microengine,
therefore the data movement does not stall or impact other instruction processing
(it is the responsibility of software to synchronize usage of read data).
2.3.4.3 Next Neighbor Registers
Next Neighbor registers, when used as a source in an instruction, supply operands to the execution
datapath. They are written in two different ways:
1. By an adjacent Microengine (the “Previous Neighbor”).
2. By the same Microengine they are in, as controlled by CTX_ENABLE[NN_MODE].
The specific register is selected in one of two ways:
1. Context-relative, the register number is encoded in the instruction.
2. As a Ring, selected via NN_GET and NN_PUT CSR registers.
The usage is configured in CTX_ENABLE[NN_MODE].
When CTX_ENABLE[NN_MODE] is ‘0’ — when Next Neighbor is a destination in an
instruction, the result is sent out of the Microengine, to the Next Neighbor Microengine.
When CTX_ENABLE[NN_MODE] is ‘1’ — when Next Neighbor is used as a destination in
an instruction, the instruction result data is written to the selected Next Neighbor register in the
same Microengine. Note that there is a 5-instruction latency until the newly written data may
be read. The data is not sent out of the Microengine as it would be when
CTX_ENABLE[NN_MODE] is ‘0’.
Table 4. Next Neighbor Write as a Function of CTX_ENABLE[NN_MODE]
NN_MODE
Where the Write Goes
External? NN Register in this
Microengine?
0Yes No
1No Yes