Intel MPCBL0001 manual FWH 0 Main Bios, FWH 1 Backup/Recovery Bios, Flash ROM Backup Mechanism

Features Overview

Flash ROM BIOS updates can be performed by an end user or a network administrator over the LAN. The system should complete booting to an OS, MS-DOS* or logon to Linux* as root user. The system should have a local copy of the flash program and the BIOS data files or have the capability to copy the flash program and BIOS data files onto a local drive via the network. The flash program has a command line interface to specify the path and the file name of the BIOS data files. After completing the BIOS ROM update the user should shutdown and reset the system to let the new BIOS ROM take effect. See Section 7.7, “BIOS Updates” on page 102 for more information.

2.2.6.1FWH 0 (Main BIOS)

BIOS execute code off this flash and perform checksum validation of its operational code. This checksum occurs in the boot block of the BIOS. The BIOS image is also stored in FWH0. When user performs BIOS update, the BIOS image will be stored in FWH 0 only. FWH0 will also store the factory default CMOS settings user configured CMOS settings.

1.When user "Load optimal defaults" from the BIOS setup screen, it restores the factory default by copying the "Factory Default" settings from FWH0 to ICH3 (CMOS).

2.When user "Save custom defaults" from the BIOS setup screen, the changes will be made to the CMOS settings on ICH3 and then copied from ICH3 to FWH0.

3.When user "Load custom defaults" from the BIOS setup screen, the "custom" CMOS settings are copied from FWH0 to ICH3.

2.2.6.2FWH 1 (Backup/Recovery BIOS)

FWH 1 stores the recovery BIOS. In the event of checksum failure on the Main BIOS operational code, BIOS will request BMC to switch FWH, so that the board will be able to boot up from FWH1 for recovery.

User is able to boot up the board from FWH1 by executing an OEM IPMI command as well (see Section 3.7.1, “Reset BIOS Flash Type” on page 47).

2.2.6.3Flash ROM Backup Mechanism

The on-board Intelligent Platform Management Controller (IPMC) manages which of the two BIOS flash ROMs is used during the boot process. The IPMC monitors the boot progress and can change the flash ROM selection and reset the processor.

The default state of this control configures the primary Firmware Hub (FWH) ROM device ID to be the boot device; the secondary FWH is assigned the next ID. The secondary FWH responds to the address range just below the primary FWH ROM in high memory.

The Intelligent Platform Management Controller sets the ID for both FWH devices. Boot accesses are directed to the FWH with ID = 0; unconnected ID pins are pulled low by the FWH device. In this way the IPMC may select which flash ROM is used for the boot process.

Refer to Section 3.7.1, “Reset BIOS Flash Type” on page 47 for a description of how to do this manually.

24	Intel NetStructure® MPCBL0001 High Performance Single Board Computer
	Technical Product Specification