System Timing
System Clock Speed:
Speed | CPU | l/O |
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High | 33MHz (25MHz) | 8MHz |
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LOW | 8MH.z (8MHz) | 8MHz |
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Clock Cycle Time: 125ns (8MHz)
40ns (25MHz) 30ns (33MHz)
I/O Address Map
Hex | range | Device |
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DMA controller 1, | ||
Interrupt controller 1, 8259A, Master | ||
040 | - 05F | Timer, |
060 | - 06F | 8042 (Keyboard) |
070 | - 07F | |
080 | - 09F | DMA page register, 74LS612 |
0A0 - 0BF | Interrupt controller 2, | |
0C0 - 0DF | DMA controller 2, | |
OF0 |
| Clear math coprocessor busy |
OF1 |
| Reset math coprocessor |
OF8 - OFF | Math coprocessor | |
378 | - 37F | Parallel port on board |
3F0 - 3F7 | FDD control on board | |
3F8 - 3FF | Serial port on board | |
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Note: I/O address hex 000 to FFF are reserved for the system board 110 Hex 100 to 3FF are available on the I/O channel.