VXI Technology, Inc.

(FRONT PANEL CONNECTOR)

100K

 

10K

K9

 

10pf

 

-CH1

+CH1

VMIP

BUS

IRQ*

100K

100K

CONTROL

-

6K

 

 

 

 

 

U17A

 

 

 

 

 

 

 

 

 

 

 

+

 

2K

 

 

 

 

 

 

 

 

 

 

100K

 

 

 

 

 

 

 

K9

 

 

 

 

 

10K

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

BUFCH1 -

4.7K

 

 

 

 

 

4.7K

 

 

 

 

 

 

 

DACDATA

D A C

TRIGLEV1

1K

 

U13A

 

 

 

 

DACLOAD#

+

 

 

 

 

 

 

 

DACCLK

 

 

 

 

470K

 

 

 

 

 

 

 

 

U8

 

 

 

 

 

 

 

 

 

 

COMPCH1

 

 

 

 

 

 

VCC

 

RELAYCLK

 

 

 

 

10K

 

RELAYDATA

 

 

 

 

 

 

 

 

 

LATIRQOUT

TO FRONT PANEL

U3

RELAYENA*

CONNECTOR

 

 

4.7K

 

Q34

 

1K

DATA 0-15

DATA

 

 

 

BUFFER

DATA

DOE*

 

 

 

 

U4

 

 

ADDRESS

 

 

 

 

 

 

CONTROL

 

 

0-5, 29

 

 

BUFFER

 

 

 

 

 

CONTROL

 

CONTROL

 

U1

 

 

 

 

 

 

RELAY DRIVER

U15

TO RELAY K9

FIGURE 3-1: SINGLE CHANNEL OPERATION

Due to the type of signal being monitored, input channel +CH1 is grounded. The command and data for the SCPI command INP:RANG is received by the control (U1) and data (U4) buffers and routed to the control FPGA (U3). The control FPGA converts the parallel data for the relay drivers into a serial data stream. This data (RELAYDATA) is synched to the 10 MHz (RELAYCLK) and written into the relay drivers when (RELAYENA*) goes low. The relay drivers will energize relay K9 selecting a gain of 0.1 for the differential amplifier U17A.

36

VM4016 Programming

Page 36
Image 36
VXI VM4016 user manual Control