VXI VT1422A, VT1529A/B Example PID Algorithm Listings

Example PID Algorithm Listings 491Appendix G

Appendix G

Example PID Algorithm Listings

This appendix includes listings of the built-in PIDA and PIDB, as well as the

more advanced PIDC which can be downloaded as a custom algorithm.

• PIDA Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 491

• PIDB Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 493

• PIDC Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page 500

PIDA Algorithm

Figure G-1 shows the block diagram of the PIDA algorithm.

PIDA algorithm implements the classic PID controller. This implementation

was designed to be fast. In order to be fast, this algorithm provides no

clipping limit, alarm limits, status management or CVT/FIFO

communication (History Modes). The algorithm performs the following

calculations each time it is executed:

Error = Setpoint - <inp_chan>

I_out = I_out + I_factor * Error

<outp_chan> = P_factor * Error + I_out + D_factor * (Error - Error_old)

Error_old = Error.

Setpoint

Variable ++

-

<outp_chan>

channel

<inp_chan>

channel

process

P_factor

Variable

D_factor

Variable

I_factor

Variable

ΣΣ

I_out

variable

Error

variable

Figure G-1. The Simple PID Algorithm "PIDA"

Contents

Main Where to Find it - Online and Printed Information VT1422A Remote Channel Multi-Function DAC Module Users and SCPI Programming Manual Page 3 VXI TECHNOLOGY WARRANTY STATEMENT U.S. Government Restricted Rights 4 Safety Symbols WARNINGS Note for European Customers Page Page Page Page Contents VT1422A Remote Channel Multi-function DAC Module Page Page Page Page Page Page Page Page Page Page Page Support Resources Page Chapter 1 Getting Started Configuring the VT1422A Page Page Installing SCPs: Step 2, Mounting an SCP Installing SCPs: Step 3, Reinstalling the Cover VT1422A Installing SCPs: Step 4, Labeling Page Accessing and Locating JM2201 and JM2202 VT1422A Installing the Module Instrument Drivers About Example Programs Verifying a Successful Configuration Page Page Chapter 2 Field Wiring Planning the Wiring Layout 36 Field Wiring Chapter 2 Terminal Module Figure 2-1. Channel Numbers at SCP Positions Terminal Module Note: Each channel line represents Both a Hi and Lo signal line. Sense SCPs and Output SCPs Planning for Thermocouple Note Faceplate Connector Pin-Signal Lists Figure 2-3 shows the Faceplate Connector Pin Signal List for the VT1422A. Figure 2-3. VT1422A Faceplate Connector Pin Signals V Count From Top Optional Terminal and Connector Modules The RJ-45 Connector Module Spring Terminal Module Layout Caution 42 Field Wiring Chapter 2 Figure 2-5. VT1422A Spring Terminal Module Screw Terminal Module Layout Figure 2-6 shows the VT1422A Option 011 Screw Terminal Module features and jumper locations. RT1 44 Field Wiring Chapter 2 Reference Temperature Sensing with the VT1422A Figure 2-8. Remote Thermistor or RTD Connections Terminal Module Field Wiring Figure 2-7. On-Board Thermistor Connection Terminal Module Field Wiring Terminal Module Considerations for TC Measurements Preferred Measurement Connections IMPORTANT! Notes A B C D E Figure 2-9. Preferred Signal Connections 48 Field Wiring Chapter 2 Figure 2-10. GRD/GND Circuitry on Terminal Module SC Figure 2-11. Grounding the Guard Terminals P TerminalModule Connecting the On-Board Thermistor Figure 2-12. Temperature Sensing for the Terminal Module J1 See Figure 2-13 on page 50 to remove the cover 50 Field Wiring Chapter 2 Wiring and Attaching the Terminal Module Figure 2-13. Opening and Wiring the VT1422As Terminal Module Figures 2-13 and 2-14 show how to open, wire and attach the terminal module to a VT1422A. Page Removing the VT1422A Terminal Modules Figure 2-15 shows how to remove the Spring Terminal and Screw Terminal Modules from the VT1422A. Attaching and Removing the VT1422A RJ-45 Module 54 Field Wiring Chapter 2 Adding Components to the Terminal Module Figure 2-18. Series & Parallel Component Examples Default Circuit Figure 2-17. Additional Component Location Normal Mode Low-Pass Filter Circuit Spring and Screw Terminal Module Wiring Maps Figure 2-19 shows the Spring Terminal Module wiring map. Figure 2-19. Spring Terminal Module Full-Size Wring Map Top Allwiring entering Terminal Modulepasses under this strainrelief bar Figure 2-20 shows the Screw Terminal Module wiring map. Page Page Chapter 3 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Instrument Setup for Remote Strain Measurements Preparing the VT1422A for Installation Overview Preparing the VT1529A/B for Use WARNING Installing User Selected 1/4 Bridge Resistors (Optional) WARNING Removing the Top Cover 60 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Chapter 3 Detail "A" Figure 3-2. Removing the VT1529A/B Top Cover Programming the VT1422A & VT1529A/B for Remote Strain Measurement 61Chapter 3 Locating Resistors Figure 3-4. Installing User 1/4 Bridge Resistors m P403 Figure 3-3. Locating User 1/4 Bridge Resistor Positions Connecting VT1529A/Bs to the VT1422A Cabling Supplies and Tools Two Interconnect Methods The Option 001 RJ-45 Connector Module Spring and Screw Terminal Modules Page Example Terminal Module to VT1529A/B Connection Terminal Module Connection Formula Connecting Excitation Supplies Notes Page Programming the VT1422A & VT1529A/B for Remote Strain Measurement 69Chapter 3 Connecting the VT1529A/B to Strain Gages Pinout for Lower Connector Row Figure 3-8. VT1422A to Strain Gage Connection -- -+ VT1529A/B Bridge Configurations - Q Figure 3-10. Bridge Completion for a Quarter Bridge Channel The Quarter Bridge The Half Bridge - id B lf The Full Bridge F - id B Connecting to the VT1529A/Bs Dynamic Strain Ports Extending the Dynamic Strain Connection Note 74 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Chapter 3 Table 3-4. Dynamic Strain Extender Cable Pin-Out Dynamic Strain Port Offset Control Note Remote Strain Channel Addressing Runtime Remote Scan Verification Programming the VT1422A & VT1529A/B for Remote Strain Measurement 77Chapter 3 Module Figure 3-15. Remote Strain Channel Addressing Term ina l T Programming for Remote Strain Measurement Measure Strain Using Built-in Strain EU Note Programming the VT1422A & VT1529A/B for Remote Strain Measurement 81Chapter 3 Figure 3-16. Sequence for Built-in Strain EU Conversion 82 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Chapter 3 Built-in EU Conversion Measure Strain Using User Specified EU 84 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Chapter 3 Figure 3-17. Sequence for Users Custom EU Conversion Programming the VT1422A & VT1529A/B for Remote Strain Measurement 85Chapter 3 Custom EU Conversion Measure Bridge Voltages and Convert to Strain Page 88 Programming the VT1422A & VT1529A/B for Remote Strain Measurement Chapter 3 Figure 3-18. Converting Bridge Voltage Measurements to Strain Voltage Conversion Programming the VT1422A & VT1529A/B for Remote Strain Measurement 89Chapter 3 Verifying Correct Bridge Completion (Shunt Cal) Programming the VT1422A & VT1529A/B for Remote Strain Measurement 91Chapter 3 Figure 3-20. Performing Shunt Calibration Built-in Strain Conversion Equations Page Page Chapter 4 Programming the VT1422A for Data Acquisition and Control About This Chapter Overview of the VT1422A Multifunction DAC Module Multifunction DAC? Flexible Signal Conditioning for Input and Output Remote Multiplexing and Signal Conditioning Programmable Signal Conditioning and EU Scan List and/or C Language Control Programming Operational Overview Acquire Input Values Start Algorithms Communicating with Algorithms Algorithms Control Output Values Detailed Instrument Operation Cycle Page Programming Model Programming the VT1422A for Data Acquisition and Control 103Chapter 4 Before INIT Figure 4-3. Module States AfterINIT Executing the Programming Model Programming the VT1422A for Data Acquisition and Control 105Chapter 4 . Figure 4-4. Programming Sequence 106 Programming the VT1422A for Data Acquisition and Control Chapter 4 Programming Overview Diagram Setting up Analog Input and Output Channels Configuring Programmable Analog SCP Parameters Setting SCP Gains Setting Filter Cutoff Frequency Setting the VT1505A Current Source SCP and VT1518A Resistance Measurement SCP NOTES Page Linking Strain Note NOTE Custom EU Conversions Linking Output Channels to Functions Setting Up Digital Input and Output Channels Setting Up Digital Inputs Setting Input Polarity Setting Input Function Setting Up Digital Outputs Setting Output Polarity Setting Output Drive Type Setting Output Functions Page Performing Channel Calibration (Important!) Calibrating the VT1422A Operation and Restrictions How to Use *CAL? What *CAL? Does Defining an Analog Input Scan List (ROUT:SEQ:DEF) Note Controlling Scan List Data Destination Defining C Language Algorithms Note for VXIplug&play users Global Variable Definition Algorithm Definition Pre-setting Algorithm Variables Defining Data Storage Specifying the Data Format Selecting the FIFO Mode Setting up the Trigger System Arm and Trigger Sources Selecting the Trigger Source NOTES Selecting Trigger Timer Arm Source Programming the Trigger Timer Setting the Trigger Counter Sending Trigger Signals to Other Instruments INITiating the Module/Starting Scanning and Algorithms Starting Scanning and/or Algorithms The Operating Note Reading Running Algorithm Values Reading CVT Data Important! Note Reading FIFO Data Which FIFO Mode? Page Reading Algorithm Variables Directly Modifying Running Algorithm Variables Updating Algorithm Variables and Coefficients Enabling and Disabling Algorithms NOTE Setting Algorithm Execution Frequency Example SCPI Command Sequence Example VXIplug&play Driver Function Sequence Page Using the Status System Programming the VT1422A for Data Acquisition and Control 143Chapter 4 QUESTIONABLEDATAGROUP Figure 4-10. VT1422A Status System OPERATIONSTATUS GROUP STATUSBYTE GROUP Status Bit Descriptions Questionable Data Group Operation Status Group Standard Event Group Enabling Events to be Reported in the Status Byte Configuring the Enable Registers Reading the Status Byte Clearing the Enable Registers The Status Byte Groups Enable Register Reading Status Groups Directly Reading Event Registers Clearing Event Registers VT1422A Background Operation Updating the Status System and VXIbus Interrupts Creating and Loading Custom EU Conversion Tables Standard EU Operation Custom EU Operation NOTE Custom EU Tables Custom Thermocouple EU Conversions Custom Reference Temperature EU Conversions Creating Conversion Tabl es Loading Custom EU Tabl es Summary Compensating for System Offsets System Wiring Offsets Important Note for Thermocouples Residual Sensor Offsets Operation Special Considerations Maximum Tare Capability Changing Gains or Filters Unexpected Channel Offsets or Overloads Detecting Open Transducers NOTES More On Auto Ranging Settling Characteristics Background Checking for Problems Fixing the Problem Use Amplifier SCPs NOTE Adding Settling Delay for Specific Channels Page Chapter 5 Advanced Programming with the VT1529B Additional Capabilities of the VT1529B Note Changes to the Use Model Engineering Units Conversion Done in VXIplug&play Driver Note Must Count writefifo Calls in Algorithms New SCPI Commands Note Strain Measurements Field Wiring for Excitation Note Strain Measurement 166 Advanced Programming with the VT1529B Chapter 5 Figure 5-1. Sequence for VT1529B Strain Conversion Strain Conversion Alternate Method of Computing Strain Note Temperature Measurements Note Connecting the VT1586A to the VT1529B Note Page 172 Advanced Programming with the VT1529B Chapter 5 Field Wiring of the VT1586A Figure 5-4. VT1586A Terminal Panel Connections Right Side Note Left Side Notes Figure 5-5. Recommended Reference Thermistor Divider Circuit Figure 5-6. Recommended Reference Thermistor Field Wiring + - V Temperature Measurement Temperature Conversion Voltage Measurements Note Field Wiring for dc Volt age Pinout for Lower Connector Row Low-Level Inputs High-Level Inputs Pinout for Upper Connector Row Note DCV Measurement Settling Time Considerations Page Page Chapter 6 Creating and Running Algorithms Learning Hint Overview of the Algorithm Language Example Language Usage The Algorithm Execution Environment The Main Function How User Algorithms Fit In Creating and Running Algorithms 185Chapter 6 End main() function Accessing the VT1422A's Resources algorithms. ALG_NUM = 1 for ALG1, 2 for ALG2, etc. output algorithm data to the application program. Accessing I/O Channels Defined Input and Output Channels Accessing Remote Scan Status Runtime Remote Scan Verification Runtime Scan States Algorithm Language Support Operating Model Example Scan Verification Algorithms alg:scal? 'algn','S125' Timing Impact Defining and Accessing Global NOTES Determining First Execution (First_loop) Initializing Variables Sending Data to the CVT and FIFO Important! Setting a VXIbus Interrupt Determining An Algorithm's Identity (ALG_NUM) Calling User Defined Functions NOTE Operating Sequence Overall Sequence Execution Order A Common Error to Avoid Creating and Running Algorithms 195Chapter 6 VXIbus Figure 6-2. Algorithm Operating Sequence Diagram Defining Algorithms (ALG:DEF) Note for VXIplug&play Users ALG:DEFINE in the Programming ALG:DEFINE's Three Data Formats NOTE Changing a Running Algorithm Defining an Algorithm for Swapping NOTE How Does it Work? Determining an Algorithm's Size NOTES A Very Simple First Algorithm Writing the Running the Modifying an Example PID Algorithm PIDA with Digital On-Off Control Algorithm to Algorithm Communication Communication Using Channel Identifiers Implementing Multivariable Control Communication Using Global Implementing Feed Forward Control Creating and Running Algorithms 203Chapter 6 Figure 6-4. Inter-algorithm Communication with Globals To set up the algorithms for this example: 1. Define the global variable <cold_setpoint>. ALG:DEF 'GLOBALS','static float cold_setpoint;' 2. Define the following algorithm language code as ALG1, the ratio station algorithm. 204 Creating and Running Algorithms Chapter 6 Non-Control Algorithms Process Monitoring Implementing Setpoint Profiles Page Algorithm Language Reference Standard Reserved Keywords NOTE Special VT1422A Reserved Keywords Identifiers Special Identifiers for Channels Special Identifiers for Remote Scan Status NOTE Operators Assignment Operator Arithmetic Operators Intrinsic Functions and Statements Note Program Flow Control Conditional Constructs Exiting the Algorithm Data Types The Static Modifier Data Structures static float simp_var, any_var; simp_var = 123.456; any_var = -23.45; Another_var = 1.23e-6; Bitfield Access NOTES Language Syntax Summary NOTE Page Page Page Program Structure and Syntax Declaring Variables Assigning Values NOTE The Operations Symbols The Arithmetic Operators Unary Arithmetic Operator The Comparison Operators The Logical Operators Page Comment Lines Creating and Running Algorithms 221Chapter 6 Overall Program Structure Page Chapter 7 VT1422A Command Reference Using This Chapter Overall Command Index Page Page Page Page Common Commands Command Fundamentals Common Separator Format SCPI Implied Commands Variable Command Syntax Parameters Page Note Notes Linking Commands Note Data Types SCPI Command Reference ABORt Subsystem Syntax CAUTION Comments ABORt does not affect any other settings of the trigger system. When the Usage ALGorithm Subsystem Syntax ALGorithm[:EXPLicit]:ARRay Note Usage ALGorithm[:EXPLicit]:ARRay? Comments An error is generated if <alg_name> or <array_name> is not defined. Page Note When accepted and Usage Notes ALGorithm[:EXPLicit]:SCALar Note Comments To send values to a global scalar variable, set the <alg_name> parameter to Usage ALGorithm[:EXPLicit]:SCALar? Comments An error is generated if <alg_name> or <var_name> is not defined. ALGorithm[:EXPLicit]:SCAN:RATio Notes Comments Page ALGorithm:UPDate[:IMMediate] Comments Variables and algorithms can be accepted during Phase1-INPUT or ALGorithm:UPDate:CHANnel Comments The duration of the level change to the designated bit or channel MUST be at Note ALGorithm:UPDate:WINDow ALGOrithm:UPDate:WINDow? ARM Note Subsystem Syntax ARM[:IMMediate] Page CALCulate Subsystem Syntax CALCulate:TEMPerature:THERmistor? Comments Returned Value: thermistor temperature in C. The data type is float32. Usage Usage Page CALibration Subsystem Syntax CALibration:CONFigure:RESistance Comments Related Commands: CAL:VAL:RES, CAL:STOR ADC CALibration:CONFigure:VOLTage Comments The <range> parameter must be within 5% of one of the five following values: CALibration:REMote? Comments Individual channels in <ch_list> must be for RSCUs, although channel ranges CALibration:REMote:DATA Comments CAL:REM:DATA sends to the VT1422A a definite length block of 1024 float64 CALibration:REMote:DATA? CALibration:TARE Note for RSC Units Notes For Thermocouples Comments CAL:TARE also performs the equivalent of a *CAL? operation. This operation CALibration:TARE:RESet CALibration:TARE? CALibration:VALue:RESistance Comments Use the CAL:CONF:RES command to configure the reference resistor for Page DIAGnostic Subsystem Syntax DIAGnostic:CALibration:SETup[:MODE] Comments When <mode> is set to 1 (the *RST Default) channels are calibrated using the Usage DIAGnostic:CALibration:SETup[:MODE]? Comments Returns a 1 when channels are calibrated using the Least Squares Fit method to DIAGnostic:CALibration:TARE[:OTDetect]:MODE Comments When <mode> is set to 0 (the *RST Default), channels are tare calibrated with Usage Usage Page DIAGnostic:OTDetect[:STATe] Comments Open Transducer Detection is enabled/disabled on a whole Signal Conditioning Note Usage Usage DIAGnostic:QUERy:SCPREAD? Comments NOTE: This command may not be used while instrument is INITed. Usage DIAGnostic:REMote:USER:DATA? Comments The <channel> parameter must specify a single channel only. The channel must DIAGnostic:TEST:REMote:NUMber? DIAGnostic:TEST:REMote:SELFtest? Comments The <channel> parameter may contain only any single channel number on a Usage Page FETCh? Use Sequence Note FORMat Subsystem Syntax FORMat[:DATA] Comments The REAL format is IEEE-754 Floating Point representation. Note Usage Page INITiate INPut Subsystem Syntax INPut:FILTer[:LPASs]:FREQuency Comments The <cutoff_freq> parameter may be specified in kilohertz (kHz). A Page INPut:FILTer[:LPASs][:STATe] Comments If the SCP has not yet been programmed, ON enables the SCP's default Usage INPut:FILTer[:LPASs][:STATe]? Usage INPut:GAIN? Usage Usage INPut:POLarity Comments If the channels specified are on an SCP that doesn't support this function, an Usage INPut:POLarity? MEASure Subsystem Syntax MEASure:VOLTage:EXCitation? Note Notes MEASure:VOLTage:UNSTrained? Notes Comments This command is only for use on channels measured with the VT1529A/B. If Page MEMory Subsystem Syntax Note Use Sequence Note Usage MEMory:VME:ADDRess? Comments Returned Value: numeric. Usage Usage MEMory:VME:SIZE? Comments This command is only available in systems using an Agilent/HPE1405B/06A OUTPut Subsystem Syntax OUTPut:CURRent:AMPLitude Note Comments Select 488E-6 (or MAX) for measuring resistances of less than 8000 . Select Page OUTPut:CURRent[:STATe]? Usage OUTPut:POLarity Comments If the channels specified do not support this function, an error will be generated. Usage OUTPut:POLarity? OUTPut:SHUNt Comments If <ch_list> specifies a non strain SCP, a 3007 "Invalid signal conditioning Usage OUTPut:TTLTrg<n>[:STATe]? Comments Returned Value: Returns 1 or 0. The data type is int16. Usage Page OUTPut:VOLTage:AMPLitude Note Comments To turn off excitation voltage (when using external voltage source) program Usage OUTPut:VOLTage:AMPLitude? Usage ROUTe Subsystem Syntax ROUTe:SEQuence:DEFine Comments The <ch_list> parameter must contain analog input channels only. On-board channel CVT Addressing (1nn) Page SAMPle Subsystem Syntax SAMPle:TIMer Comments The minimum <interval> is 40s. The resolution for <interval> is 2.5 s. Page [SENSe] Subsystem Syntax [SENSe:]DATA:CVTable? Comments [SENSe:]DATA:CVTable? (@<element_list>) allows the latest values from Note Page [SENSe:]DATA:FIFO:HALF? Comments For acquiring data from continuous scans, an application needs to execute a Note Usage [SENSe:]FREQuency:APERture Comments If the channels specified are on an SCP that doesn't support this function, Usage [SENSe:]FREQuency:APERture? Comments If the channel specified is on an SCP that doesn't support this function, an error [SENSe:]FUNCtion:CONDition Comments The VT1533A SCP senses 8 digital bits on each channel specified by this Usage Usage [SENSe:]FUNCtion:HVOLtage Comments The VT1422A has five ranges: 0.0625V dc, 0.25 Vdc, 1 Vdc, 4 Vdc, and Usage [SENSe:]FUNCtion:RESistance Comments The VT1422A has five ranges: 0.0625V dc, 0.25 Vdc, 1 Vdc, 4 Vdc, and Page Note Comments Strain measurements require the use of Bridge Completion Signal Conditioning Usage Note Usage [SENSe:]FUNCtion:TEMPerature Comments Resistance temperature measurements (RTDs and THERmistors) require the use Usage Usage [SENSe:]FUNCtion:TOTalize Comments The totalize function counts rising edges of digital transitions at Frequency/ Usage [SENSe:]REFerence:CHANnels Comments Use SENS:FUNC:TEMP to configure channels to measure thermocouples. Usage [SENSe:]REFerence:CHANnels:POST Comments Use SENS:FUNC:TEMP:POST to configure channels to measure thermocouples. Usage [SENSe:]REFerence:TEMPerature:POST Comments This command is used to specify to the VT1422A the temperature of a controlled Usage Usage [SENSe:]STRain:BRIDge[:TYPE] Comments For a description of the effects of <select> see "VT1529A/B Bridge Usage [SENSe:]STRain:BRIDge:[TYPE]? Comments The <channel> parameter must be a single channel only. Usage [SENSe:]STRain:EXCitation Note Comments The <ch_list> parameter must specify the channel used to sense the bridge Usage [SENSe:]STRain:GFACtor? Comments Returned Value: Numeric value of gage factor. The data type is float32. Usage Usage [SENSe:]STRain:POISson? Comments Returned Value: numeric value of the Poisson ratio. The data type is float32. Usage SOURce Subsystem Syntax SOURce:FM[:STATe] Comments This command is coupled with the SOURce:PULM:STATE command. If the Usage SOURce:FUNCtion[:SHAPe]:PULSe Comments This PULSe channel function is further defined by the SOURce:FM:STATe and SOURce:FUNCtion[:SHAPe]:SQUare Comments Send with VXIplug&play Function: hpe1422_cmd(...) Usage SOURce:PULM[:STATe] Page STATus Note Initializing the Status System Subsystem Syntax Weighted Bit Values The Operation Status Group STATus:OPERation:CONDition? Comments The Condition register reflects the real-time state of the status signals. Usage STATus:OPERation:ENABle Page STATus:OPERation:NTRansition Usage STATus:OPERation:NTRansition? Usage The Questionable Data Group STATus:QUEStionable:CONDition? Comments The Condition register reflects the real-time state of the status signals. The Usage Page STATus:QUEStionable:NTRansition Usage STATus:QUEStionable:NTRansition? Usage SYSTem Subsystem Syntax SYSTem:CTYPe? Usage SYSTem:CTYPe:REMote? TRIGger CAUTION Event Sequence Subsystem Syntax TRIGger:COUNt Comments When <trig_count> is set to 0 or INF, the trigger counter is disabled. Once Usage TRIGger:COUNt? Comments If TRIG:COUNt? returns 0, the trigger counter is disabled and the module will Usage TRIGger[:IMMediate] Comments This command is equivalent to the *TRG common command or the IEEE-488.2 Usage TRIGger:SOURce Note Page Page IEEE-488.2 Common Command Reference *CAL? Note *CLS *DMC *EMC *EMC? *ESE *ESE? *ESR? *GMC? *IDN? Note *LMC? *OPC Note WARNING Page *STB? *TRG *TST? Notes Page *WAI Note VT1422A Command Reference 409Chapter 7 Command Quick Reference 410 VT1422A Command Reference Chapter 7 VT1422A Command Reference 411Chapter 7 412 VT1422A Command Reference Chapter 7 VT1422A Command Reference 413Chapter 7 414 VT1422A Command Reference Chapter 7 VT1422A Command Reference 415Chapter 7 416 VT1422A Command Reference Chapter 7 IEEE-488.2 Common Command Quick Reference Category Command Title Description Page Page Specifications 419Appendix A Appendix A Specifications VT1422A Specifications Page Specifications 421Appendix A Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Page Specifications 449Appendix A VT1529A/B Specifications 450 Specifications Appendix A Specifications 451Appendix A Page Appendix B Error Messages Page Page Note Page Page Page Page Page Page Appendix C VT1529A/B Verification & Calibration Introduction Note Recommended Equipment Dummy Load Tes ts Verification Test V-1: Self-Test Test V-2: Cal Remote Troubleshooting Failures Test V-3: Sense Out Description Setup VT1529A/B Verification & Calibration 467Appendix C Figure C-2. Signal Path for Sense Out Test Test V-4: Bridge Resistors Description 468 VT1529A/B Verification & Calibration Appendix C Figure C-3. Signal Path for Bridge Resistor Test Troubleshooting Failures Test V-5: Dynamic Strain Output Port Description Note Setup 470 VT1529A/B Verification & Calibration Appendix C The signal path through the VT1529A/B is highlighted in Figure C-4. Procedure Troubleshooting Failures Test V-6: Filters Description Setup Page Troubleshooting Failures Test V-7: Shunt Cal Resistor Port Description Setup Procedure VT1529A/B Verification & Calibration 475Appendix C Test V-8: Internal Shunt Description To VT1422A (VT1539A SCP) X2Buffer RJ-45 X2 2:1 Mux Cal- 476 VT1529A/B Verification & Calibration Appendix C Cal+ ) Buffer Figure C-6. Signal Path for Internal Shunt Test Calibration Page Appendix D Glossary Page Page Page Appendix E Wiring and Noise Reduction Methods Separating Digital and Analog SCP Signals Recommended Wiring and Noise Reduction Techniques Wiring Checklist VT1422A Guard Connections Common Mode Voltage Limits When to Make Shield Connections Noise Due to Inadequate Card Grounding VT1422A Noise Rejection Normal Mode Noise (Enm) Common Mode Noise (Ecm) Keeping Common Mode Noise out of the Amplifier Appendix F Generating User Defined Functions Introduction Haversine Example Page Limitations Appendix G Example PID Algorithm Listings process - PIDA Algorithm 492 Example PID Algorithm Listings Appendix G PIDA Source Listing PIDB Algorithm process Clipping Limits Alarm Limits Manual Control Status Variable History Mode Example PID Algorithm Listings 495Appendix G PIDB Source Listing 496 Example PID Algorithm Listings Appendix G Example PID Algorithm Listings 497Appendix G 498 Example PID Algorithm Listings Appendix G Example PID Algorithm Listings 499Appendix G 500 Example PID Algorithm Listings Appendix G PIDC Algorithm Example PID Algorithm Listings 501Appendix G 502 Example PID Algorithm Listings Appendix G Example PID Algorithm Listings 503Appendix G 504 Example PID Algorithm Listings Appendix G Index VT1422A Remote Channel Multi-function DAC Module Symbols Numerics A B C DATA DATA? [:MODE] [:MODE]? :MODE? [:OTDetect]:MODE :TEMPerature Page D DATA DATA? E F G H I K L M thermocouple measurements N O P Q R S [:MODE] [:MODE]? Page T :MODE :TEMPerature OUTPut:TTLTrg:SOURce? U OUTPut:VOLTage:AMPLitude V OUTPut:VOLTage:AMPLitude? W Z Online at vxitech.com 949 955 1VXI VT1413C VT1415A/1422A Overview Features Automated Calibration for Better Measurements Flexibility with Deterministic Control Other Features Digital Sampling Closed Loop Control System Powerful Control Capability Online at vxitech.com 949 955 1VXI Wide Choice of Inputs/outputs Operator Control Signal Conditioning Plug-Ons Voltage Measurements VT1415A/1422A VT1415A/1422A Transient Measurements Product Specifications Transient Voltage Measurements Transient Strain Measurements Measurement Specifications Note: For field wiring, the use of shielded twisted pair wiring is highly recommended. Jitter: Measurement Accuracy Accuracy Data VT1415A/1422A VT1415A/1422A Loop Control Specifications I/O General General Specifications Online at vxitech.com 949 955 1VXI Algorithmic Closed Loop Controller and ACCESSORIES Ordering Information VT1415A/VT1422A