Intel manual Side View 41210 Bridge 567-Ball Fcbga Package Dimensions

Page 17

Package Information

Figure 7. Side View - 41210 Bridge 567-Ball FCBGA Package Dimensions

FC BGA Substrate

Die

J

1.940 – 0.150

		Detail	J
H		Scale	5:1
H
			0.74 – 0.025
			0.100 – 0.025
			Die Solder
			Bumps
		Underfill
Detail	H	Epoxy
Scale	5:1
		1.170 – 0.085
		0.600 – 0.100

BGA Solder Balls

B2712-01

Intel® 41210 Serial to Parallel PCI Bridge Design Guide

17

Image 17

Contents Design Guide Intel 41210 Serial to Parallel PCI BridgeIntel 41210 Serial to Parallel PCI Bridge Design Guide Contents Figures Description TablesRevision History This page intentionally left blank Terminology and Definitions About This DocumentTerminology and Definitions Sheet 1 Term DefinitionTerminology and Definitions Sheet 2 About This DocumentIntroduction2 PCI Express Interface FeaturesPCI-X Interface Features SMBus for configuration register initialization Power ManagementSMBus Interface IntroductionMicrocontroller Connections to the 41210 Bridge Bridge Microcontroller Block DiagramRelated Documents JtagIntel41210 Serial to Parallel PCI Bridge Applications Intel 41210 Bridge Adapter Card Block DiagramThis page intentionally left blank Package Information Package SpecificationPackage Information Bottom View 41210 Bridge 567-Ball Fcbga Package DimensionsSide View 41210 Bridge 567-Ball Fcbga Package Dimensions This page intentionally left blank 41210 Bridge Decoupling Guidelines Power Plane LayoutPower Plane Layout Bridge Decoupling Guidelines Split Voltage PlanesPCI VCC15 and VCC33 Voltage Requirements Bridge Reset and Power Timing Considerations5ARST#,BRST# and PERST# Timing Requirements Bridge Reset and Power Timing Considerations Crosstalk General Routing GuidelinesGeneral Routing Guidelines General Routing Guidelines EMI ConsiderationsDecoupling Power Distribution and DecouplingTrace Impedance Cross Section of Differential Trace Differential ImpedanceAdapter Card Stack Up, Microstrip and Stripline Board Layout GuidelinesAdapter Card Topology Adapter Card Stackup Board Layout GuidelinesINTx Routing Table PCI-X Layout GuidelinesInterrupts Interrupt Routing for Devices Behind a Bridge PCI ArbitrationPCI-X Layout Guidelines Interrupt Binding for Devices Behind a BridgePCI Resistor Compensation PCI General Layout GuidelinesPCI/PCI-X Frequency/Mode Straps PCI-X SignalsPCI Pullup Resistors Not Required BCBE#74, BDEVSEL#, BFRAME#, BINTA#, BINTB#, BINTC#, BINTD# PCI Clock Layout GuidelinesPCI Clock Distribution and Matching Requirements Parameter Routing Guidelines PCI-X Clock Layout Requirements SummaryPCI-X Slot Guidelines PCI-X Topology Layout GuidelinesParameter Routing Guideline for Lower AD Bus Embedded PCI-X 133 MHzEmbedded PCI-X 133 MHz Routing Recommendations Embedded PCI-X 100 MHz Routing Recommendations Embedded PCI-X 100 MHzPCI-X 66 MHz Embedded Routing Recommendations PCI-X 66 MHz Embedded TopologyPCI 66 MHz Embedded Table PCI 66 MHz Embedded TopologyPCI 33 MHz Embedded Routing Recommendations PCI 33 MHz Embedded Mode TopologyThis page intentionally left blank General recommendations PCI Express LayoutAdapter Card Layout Guidelines PCI-Express Layout GuidelinesPCI Express Layout Adapter Card Routing Recommendations Sheet 1Adapter Card Routing Recommendations Sheet 2 This page intentionally left blank 10.1 41210 Bridge Analog Voltage Filters ConfigCircuit Implementations Circuit Implementations PCI Analog Voltage FiltersPCI Express Analog Voltage Filter Vssape Bandgap Analog Voltage FilterVccape VSS Vssbgpe Bandgap Analog Voltage Filter CircuitVccbgpe PERCOMP0 PERCOMP1 Rcomp Reference and Compensation Circuit ImplementationsBit Value SMBUs Address ConfigurationSM Bus Board Stack-up Bridge Customer Reference BoardsMaterial Layer Type Thickness Copper WeightImpedance Bridge Customer Reference BoardsMechanical Outline of the 41210 Bridge Board OutlineThis page intentionally left blank PCI Express Interface Signals Design Guide ChecklistSignals Recommendations Reason/Impact PERCOMP10PCI/PCI-X Interface Signals Design Guide ChecklistBM66EN PERST# AM66ENApcixcap BpcixcapSignals Miscellaneous SignalsSMBus Interface Signals Signal Recommendations Reason/Impact Power and Ground SignalsVCC15 VCC33Jtag Signals

Related manuals

Manual 120 pages 33.98 Kb