Intel 41210 manual Power Plane Layout, Bridge Decoupling Guidelines

Power Plane Layout 4

This chapter provides details on the decoupling and voltage planes needed to bias the 41210 Bridge package.

4.141210 Bridge Decoupling Guidelines

Table 2 lists the decoupling guidelines for the 41210 Bridge. Figure 8 and Figure 9 provide the decoupling capacitors around the 41210 Bridge ball grid pins.

Figure 8. Decoupling Placement for Core and PCI Express Voltage Planes

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Intel® 41210 Serial to Parallel PCI Bridge Design Guide 19