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| Design Guide Checklist |
Table 23. Power and Ground Signals |
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| Signal | Recommendations | Reason/Impact |
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| 100Ω ±1% (1/4 W) pulldown resistor to ground. | Analog compensation pin for |
| RCOMP |
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| PCI. 0.75V nominal. | |
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| The trace impedance of this signal should be < 0.1Ω. | |
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| Connect to 1.5V power supply. |
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| Note: Linear voltage regulators are recommended |
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| when using 1.5 Volt power supplies. |
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| Decoupling: |
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| VCC15 | 5 0.1uF caps beneath package (backside of board) | 1.5V ±5% core voltage. |
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| 2 1.0 uF caps as close as design rules permit to |
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| 3 10 uF caps as close as design rules permit to |
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| package |
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| Connect to 3.3V power supply. |
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| Decoupling: TBD |
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| The platform must insure that the VCC33 voltage rail |
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| be greater than to (or no less than 0.5V below) VCC15 |
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| VCC33 | (absolute voltage value at all times during 41210 | 3.3V ±5% PCI I/O voltage. |
| Bridge operation, including during system power up, | ||
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| power down or any other time during system operation. |
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| This can be accomplished by placing a diode (with a |
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| voltage drop < 0.5V) between VCC15 and VCC33. |
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| Anode will be connected to VCC15 and cathode will be |
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| connected to VCC33. |
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| VCCAPE | Connect to 1.5V power supply. | 1.5V ±3% Analog PCI Express |
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| voltage. | |
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| VCCAPCI[2:0] | See Figure 23 for circuit. | Analog PCI voltage pins. |
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| Voltage output of the bandgap filter circuit into 41210 |
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| VCCBGPE | Bridge, separated from the rest of the VCC15s. See | 2.5V ±3% PCI Express voltage. |
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| Figure 25 for circuit. |
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| Connect to 1.5V power supply. |
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| Decoupling: |
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| VCCPE | 3 0.1uF caps beneath package (backside of board) | 1.5V ±3% PCI Express voltage. |
| 4 1.0 uF caps as close as design rules permit to | ||
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| 2 10 uF caps as close as design rules permit to |
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| package |
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| VSS | Connect to ground. | Ground reference for all |
| supplies. | ||
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| VSSAPE | See Figure 24 for circuit. | Analog ground for PCI Express. |
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| VSSBGPE | Ground for the bandgap filter circuit, separated from | Ground for analog bandgap |
| the rest of the VSSs. See Figure 25 for circuit. | voltage. | |
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Intel® 41210 Serial to Parallel PCI Bridge Design Guide | 63 |