Texas Instruments TMS320C6747 DSP manual List of Tables

Page 5

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List of Tables

 

1

USB Host Controller Registers

12

2

OHCI Revision Number Register (HCREVISION) Field Descriptions

13

3

HC Operating Mode Register (HCCONTROL) Field Descriptions

14

4

HC Command and Status Register (HCCOMMANDSTATUS) Field Descriptions

15

5

HC Interrupt and Status Register (HCINTERRUPTSTATUS) Field Descriptions

16

6

HC Interrupt Enable Register (HCINTERRUPTENABLE) Field Descriptions

17

7

HC Interrupt Disable Register (HCINTERRUPTDISABLE) Field Descriptions

18

8

HC HCAA Address Register (HCHCCA) Field Descriptions

19

9

HC Current Periodic Register (HCPERIODCURRENTED) Field Descriptions

19

10

HC Head Control Register (HCCONTROLHEADED) Field Descriptions

20

11

HC Current Control Register (HCCONTROLCURRENTED) Field Descriptions

21

12

HC Head Bulk Register (HCBULKHEADED) Field Descriptions

22

13

HC Current Bulk Register (HCBULKCURRENTED) Field Descriptions

22

14

HC Head Done Register (HCDONEHEAD) Field Descriptions

23

15

HC Frame Interval Register (HCFMINTERVAL) Field Descriptions

23

16

HC Frame Remaining Register (HCFMREMAINING) Field Descriptions

24

17

HC Frame Number Register (HCFMNUMBER) Field Descriptions

24

18

HC Periodic Start Register (HCPERIODICSTART) Field Descriptions

25

19

HC Low-Speed Threshold Register (HCLSTHRESHOLD) Field Descriptions

26

20

HC Root Hub A Register (HCRHDESCRIPTORA) Field Descriptions

27

21

HC Root Hub B Register (HCRHDESCRIPTORB) Field Descriptions

28

22

HC Root Hub Status Register (HCRHSTATUS) Field Descriptions

29

23

HC Port 1 Status and Control Register (HCRHPORTSTATUS1) Field Descriptions

30

24

HC Port 2 Status and Control Register (HCRHPORTSTATUS2) Field Descriptions

32

SPRUFM8–September 2008

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Contents Literature Number SPRUFM8 September Users GuideSPRUFM8-September Contents List of Figures List of Tables Read This First Purpose of the Peripheral Universal Serial Bus Ohci Host Controller2 USB1 Module Local Bus Clock and Local Reset USB1 Module Clock and ResetInternal System Bus Clocks Needed by the USB1 Module 3 USB1 Module Bus 48-MHz Reference ClockUSB1 Module Open Host Controller Interface Functionality USB1 Module Differences From Ohci Specification for USBOhci USB Suspend State Implementation of Ohci Specification for USBOhci Interrupts USB Host Controller Access to System MemoryPhysical Addressing MMUUSB Host Controller Registers Ohci Revision Number Register Hcrevision HC Operating Mode Register HccontrolOhci Revision Number Register Hcrevision Field Descriptions REVPeriodic list enable Control list enableControl ED per bulk ED Control EDs per bulk EDSOC HC Command and Status Register HccommandstatusOCR BLF CLF HCR OCRRhsc HC Interrupt and Status Register HcinterruptstatusRhsc FNO WDH MIE HC Interrupt Enable Register HcinterruptenableHC Interrupt Disable Register Hcinterruptdisable HC Current Periodic Register Hcperiodcurrented HC Hcaa Address Register HchccaHC Hcaa Address Register Hchcca Field Descriptions HccaChed HC Head Control Register HccontrolheadedHC Head Control Register Hccontrolheaded Field Descriptions Controller HC Current Control Register HccontrolcurrentedCced HC Current Bulk Register Hcbulkcurrented HC Head Bulk Register HcbulkheadedHC Head Bulk Register Hcbulkheaded Field Descriptions HC Current Bulk Register Hcbulkcurrented Field DescriptionsHC Frame Interval Register Hcfminterval HC Head Done Register HcdoneheadHC Head Done Register Hcdonehead Field Descriptions HC Frame Interval Register Hcfminterval Field DescriptionsHC Frame Number Register Hcfmnumber HC Frame Remaining Register HcfmremainingHC Frame Number Register Hcfmnumber Field Descriptions FRTHC Periodic Start Register Hcperiodicstart HC Periodic Start Register HcperiodicstartLST HC Low-Speed Threshold Register Hclsthreshold628h Reserved 13-0HC Root Hub a Register Hcrhdescriptora Field Descriptions HC Root Hub a Register HcrhdescriptoraPotpg Nocp Ocpm NPS PSM NDPHC Root Hub B Register Hcrhdescriptorb Field Descriptions HC Root Hub B Register HcrhdescriptorbPPCM3 PPCM2 PPCM1 PPCM0 PPCM3HC Root Hub Status Register Hcrhstatus Field Descriptions HC Root Hub Status Register HcrhstatusHC Port 1 Status and Control Register HCRHPORTSTATUS1 PRS/SPR Effect Port 2 current connect status has not changed HC Port 2 Status and Control Register HCRHPORTSTATUS2Begin signaling USB reset to port When read as 0, USB reset is not being sent to portEnd of the USB reset sequence Write of 1 to this bit clears the port 2 port enable bitRfid DSP