Cypress CY7C1464AV33, CY7C1462AV33 manual 3V TAP AC Test Conditions, 5V TAP AC Test Conditions

Page 13

CY7C1460AV33

CY7C1462AV33

CY7C1464AV33

3.3V TAP AC Test Conditions

Input pulse levels

VSS to 3.3V

Input rise and fall times

1 ns

Input timing reference levels

1.5V

Output reference levels

1.5V

Test load termination supply voltage

1.5V

2.5V TAP AC Test Conditions

Input pulse levels

VSS to 2.5V

Input rise and fall time

1 ns

Input timing reference levels

1.25V

Output reference levels

1.25V

Test load termination supply voltage

1.25V

3.3V TAP AC Output Load Equivalent

 

2.5V TAP AC Output Load Equivalent

 

 

 

 

 

 

 

 

 

1.5V

 

 

 

 

 

 

 

 

 

 

 

 

 

1.25V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50Ω

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

ZO= 50Ω

 

 

 

 

 

 

 

20pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TAP DC Electrical Characteristics And Operating Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

(0°C < TA < +70°C; V = 3.135V to 3.6V unless otherwise noted)[11]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

 

 

Description

 

 

 

Test Conditions

 

Min.

 

 

 

 

Max.

 

Unit

VOH1

 

 

Output HIGH Voltage

 

IOH = –4.0 mA, VDDQ = 3.3V

 

 

 

 

 

2.4

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOH = –1.0 mA, VDDQ = 2.5V

 

 

 

 

 

2.0

 

 

 

 

 

 

 

 

 

 

 

V

VOH2

 

 

Output HIGH Voltage

 

IOH = –100 µA

VDDQ = 3.3V

 

2.9

 

 

 

 

 

 

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

2.1

 

 

 

 

 

 

 

 

 

 

 

V

VOL1

 

 

Output LOW Voltage

 

IOL = 8.0 mA

 

VDDQ = 3.3V

 

 

 

 

0.4

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOL = 1.0 mA

 

VDDQ = 2.5V

 

 

 

 

0.4

 

V

VOL2

 

 

Output LOW Voltage

 

IOL = 100 µA

 

VDDQ = 3.3V

 

 

 

 

0.2

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

 

 

 

0.2

 

V

VIH

 

 

Input HIGH Voltage

 

 

 

 

VDDQ = 3.3V

 

2.0

 

 

VDD + 0.3

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

1.7

 

 

VDD + 0.3

 

V

VIL

 

 

Input LOW Voltage

 

 

 

 

VDDQ = 3.3V

 

–0.3

0.8

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDDQ = 2.5V

 

–0.3

0.7

 

V

IX

 

 

Input Load Current

 

GND < VIN < VDDQ

 

 

 

 

 

 

–5

5

 

µA

Identification Register Definitions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Instruction Field

CY7C1460AV33

CY7C1462AV33

CY7C1464AV33

 

 

 

Description

 

 

 

 

 

 

 

(1M ×36)

 

(2M ×18)

 

(512K ×72)

 

 

 

 

Revision Number (31:29)

 

 

 

 

 

 

 

 

000

 

000

 

000

 

 

 

Describes the version number.

 

 

 

 

 

 

 

 

 

Device Depth (28:24)[12]

01011

 

01011

 

01011

 

Reserved for Internal Use

 

Architecture/Memory Type(23:18)

001000

 

001000

 

001000

 

Defines memory type and archi-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tecture

 

 

 

 

 

 

 

 

 

 

Bus Width/Density(17:12)

100111

 

010111

 

110111

 

Defines width and density

 

 

 

 

 

 

 

Cypress JEDEC ID Code (11:1)

00000110100

00000110100

00000110100

 

Allows unique identification of

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SRAM vendor.

 

ID Register Presence Indicator (0)

 

 

 

 

 

 

 

 

1

 

1

 

1

 

 

 

Indicates the presence of an ID

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

register.

 

 

 

 

 

 

 

 

 

 

Notes:

11.All voltages referenced to VSS (GND).

12.Bit #24 is “1” in the ID Register Definitions for both 2.5V and 3.3V versions of this device.

Document #: 38-05353 Rev. *D

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Contents Logic Block Diagram-CY7C1460AV33 1M x FeaturesFunctional Description Cypress Semiconductor CorporationLogic Block Diagram-CY7C1464AV33 512K x Logic Block Diagram-CY7C1462AV33 2M xSelection Guide 250 MHz 200 MHz 167 MHz Unit2M × Pin Configurations Pin Tqfp PinoutCY7C1462AV33 2M × Pin Name Type Pin Description Pin DefinitionsPower supply for the I/O circuitry Power supply inputs to the core of the deviceClock input to the Jtag circuitry Burst Read Accesses Single Read AccessesSingle Write Accesses Burst Write AccessesLinear Burst Address Table Mode = GND Interleaved Burst Address Table Mode = Floating or VDDZZ Mode Electrical Characteristics Stall Partial Write Cycle Description 1, 2, 3Function CY7C1460AV33 Function CY7C1462AV33 2,8 Disabling the Jtag Feature TAP Controller Block Diagram TAP Controller State Diagram Test Access Port TAP Performing a TAP ResetTAP Instruction Set Bypass RegisterParameter Description Min Max Unit Clock TAP TimingOutput Times Set-up Times3V TAP AC Test Conditions TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Identification Register DefinitionsIdentification Codes Scan Register SizesRegister Name Bit Size ×36 Bit Size ×18 Bit Size ×72 Instruction Code DescriptionCY7C1460AV33 1M x 36, CY7C1462AV33 2M x Bit# Ball ID Ball Fbga Boundary Scan OrderBit# Ball ID CY7C14604V33 512K x Bit# Ball ID Ball BGA Boundary Scan Order 13Maximum Ratings Electrical Characteristics Over the Operating Range15Operating Range Ambient RangeThermal Resistance17 Capacitance17AC Test Loads and Waveforms 250 200 167 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 22Read/Write/Timing24, 25 Switching WaveformsNOP,STALL and Deselect Cycles24, 25 ZZ Mode Timing28Ordering Information 250 Pin Tqfp 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History ECN No Issue Date Orig. Description of Change
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