Cypress CY7C1462AV33, CY7C1464AV33, CY7C1460AV33 manual Ball Fbga Boundary Scan Order, Bit# Ball ID

Page 15

CY7C1460AV33

CY7C1462AV33

CY7C1464AV33

165-ball FBGA Boundary Scan Order [13]

CY7C1460AV33 (1M x 36), CY7C1462AV33 (2M x 18)

Bit#	ball ID	Bit#	ball ID	Bit#	ball ID
1	N6	26	E11	51	A3

2	N7	27	D11	52	A2

3	10N	28	G10	53	B2

4	P11	29	F10	54	C2

5	P8	30	E10	55	B1

6	R8	31	D10	56	A1

7	R9	32	C11	57	C1

8	P9	33	A11	58	D1

9	P10	34	B11	59	E1

10	R10	35	A10	60	F1

11	R11	36	B10	61	G1

12	H11	37	A9	62	D2

13	N11	38	B9	63	E2

14	M11	39	C10	64	F2

15	L11	40	A8	65	G2

16	K11	41	B8	66	H1

17	J11	42	A7	67	H3

18	M10	43	B7	68	J1

19	L10	44	B6	69	K1

20	K10	45	A6	70	L1

21	J10	46	B5	71	M1

22	H9	47	A5	72	J2

23	H10	48	A4	73	K2

24	G11	49	B4	74	L2

25	F11	50	B3	75	M2

Note:

13. Bit# 89 is preset HIGH.

Bit#

ball ID

76N1

77N2

78P1

79R1

80R2

81P3

82R3

83P2

84R4

85P4

86N5

87P6

88R6

89Internal

Document #: 38-05353 Rev. *D

Page 15 of 27

[+] Feedback

Image 15

Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram-CY7C1460AV33 1M x Functional Description250 MHz 200 MHz 167 MHz Unit Logic Block Diagram-CY7C1462AV33 2M xLogic Block Diagram-CY7C1464AV33 512K x Selection Guide2M × Pin Configurations Pin Tqfp PinoutCY7C1462AV33 2M × Pin Name Type Pin Description Pin DefinitionsPower supply inputs to the core of the device Power supply for the I/O circuitryClock input to the Jtag circuitry Burst Write Accesses Single Read AccessesBurst Read Accesses Single Write AccessesInterleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Function CY7C1462AV33 2,8 Partial Write Cycle Description 1, 2, 3Stall Function CY7C1460AV33Performing a TAP Reset TAP Controller Block Diagram TAP Controller State DiagramDisabling the Jtag Feature Test Access Port TAPTAP Instruction Set Bypass RegisterSet-up Times TAP TimingParameter Description Min Max Unit Clock Output TimesIdentification Register Definitions TAP DC Electrical Characteristics And Operating Conditions3V TAP AC Test Conditions 5V TAP AC Test ConditionsInstruction Code Description Scan Register SizesIdentification Codes Register Name Bit Size ×36 Bit Size ×18 Bit Size ×72Ball Fbga Boundary Scan Order CY7C1460AV33 1M x 36, CY7C1462AV33 2M x Bit# Ball IDBit# Ball ID CY7C14604V33 512K x Bit# Ball ID Ball BGA Boundary Scan Order 13Ambient Range Electrical Characteristics Over the Operating Range15Maximum Ratings Operating RangeCapacitance17 Thermal Resistance17AC Test Loads and Waveforms 250 200 167 Parameter Description Unit Min Max Switching Characteristics Over the Operating Range 22Read/Write/Timing24, 25 Switching WaveformsNOP,STALL and Deselect Cycles24, 25 ZZ Mode Timing28Ordering Information 250 Pin Tqfp 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History ECN No Issue Date Orig. Description of Change

CY7C1462AV33, CY7C1464AV33, CY7C1460AV33 specifications

The Cypress CY7C1460AV33, CY7C1464AV33, and CY7C1462AV33 are high-performance, low-power asynchronous SRAM devices that find wide applications in various electronic systems, encompassing telecommunications, computing, and consumer electronics. These SRAM products are particularly popular for their speed, efficiency, and versatility in a range of data processing applications.

A key feature of the CY7C1460AV33 is its 64K x 16 memory architecture, while the CY7C1464AV33 offers a 256K x 16 configuration, and the CY7C1462AV33 provides a 128K x 16 setup. This allows designers to tailor their memory requirements based on the specific demands of their applications, promoting system optimization and enhancing performance.

One of the standout characteristics of these SRAM devices is their high-speed operation. With access times as low as 10 nanoseconds, they are capable of supporting demanding applications that necessitate rapid data retrieval and storage. This performance is complemented by a low cycle time, which contributes to faster data rates, enabling seamless data flow and efficient processing capabilities.

Low power consumption is another defining feature of the CY7C1460AV33, CY7C1464AV33, and CY7C1462AV33. These devices utilize advanced CMOS technology, ensuring minimal energy usage without sacrificing performance. This is particularly advantageous for battery-operated devices and applications where energy efficiency is critical.

The SRAM devices also boast robust reliability and environmental tolerance. They are designed to operate over a wide temperature range, making them suitable for various operating conditions. Additionally, the use of advanced process technology ensures data integrity and durability, allowing them to survive in harsh environments.

Furthermore, the devices support a simple interfacing design, enabling easy integration into existing systems. They feature dual-chip select and byte write functionality, which enhances flexibility in memory handling, providing the capability to manage data more effectively.

In summary, the Cypress CY7C1460AV33, CY7C1464AV33, and CY7C1462AV33 offer high-speed, low-power, and highly reliable SRAM solutions suitable for various applications. With their advanced technology and robust characteristics, these devices are invaluable in modern electronic design, enabling innovation and performance optimization across diverse fields.