Figure 21. Memory Socket Locations
Memory channels are organized as follows:
Processor 1 | channel 0: memory sockets A1, A5, and A9 |
| channel 1: memory sockets A2, A6, and A10 |
| channel 2: memory sockets A3, A7, and A11 |
| channel 3: memory sockets A4, A8, and A12 |
Processor 2 | channel 0: memory sockets B1, B5, and B9 |
| channel 1: memory sockets B2, B6, and B10 |
| channel 2: memory sockets B3, B7, and B11 |
| channel 3: memory sockets B4, B8, and B12 |
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