Texas Instruments TMS320C642X manual Revision History, Appendix a

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Preface			6
1	Introduction		7
	1.1	Purpose of the Peripheral	7
	1.2	Features	7
	1.3	Functional Block Diagram	8
	1.4	Industry Standard(s) Compliance Statement	8
2	Peripheral Architecture		9
	2.1	Bus Structure	9
	2.2	Clock Generation	10
	2.3	Clock Synchronization	11
	2.4	Signal Descriptions	11
	2.5	START and STOP Conditions	12
	2.6	Serial Data Formats	13
	2.7	Endianness Considerations	15
	2.8	Operating Modes	15
	2.9	NACK Bit Generation	16
	2.10	Arbitration	17
	2.11	Reset Considerations	18
	2.12	Initialization	18
	2.13	Interrupt Support	21
	2.14	DMA Events Generated by the I2C Peripheral	21
	2.15	Power Management	21
	2.16	Emulation Considerations	22
3	Registers		22
	3.1	I2C Own Address Register (ICOAR)	23
	3.2	I2C Interrupt Mask Register (ICIMR)	24
	3.3	I2C Interrupt Status Register (ICSTR)	25
	3.4	I2C Clock Divider Registers (ICCLKL and ICCLKH)	28
	3.5	I2C Data Count Register (ICCNT)	29
	3.6	I2C Data Receive Register (ICDRR)	30
	3.7	I2C Slave Address Register (ICSAR)	30
	3.8	I2C Data Transmit Register (ICDXR)	31
	3.9	I2C Mode Register (ICMDR)	32
	3.10	I2C Interrupt Vector Register (ICIVR)	36
	3.11	I2C Extended Mode Register (ICEMDR)	37
	3.12	I2C Prescaler Register (ICPSC)	38
	3.13	I2C Peripheral Identification Register (ICPID1)	39
	3.14	I2C Peripheral Identification Register (ICPID2)	39
Appendix A		Revision History	40

SPRUEN0D –March 2011	Table of Contents	3
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Contents Users Guide Submit Documentation Feedback Appendix a Revision HistoryList of Figures List of Tables Read This First Features Features Not SupportedPurpose of the Peripheral Industry Standards Compliance Statement Functional Block DiagramMultiple I2C Modules Connected Bus StructureClock Generation Clocking Diagram for the I2C PeripheralSignal Descriptions Clock SynchronizationInput and Output Voltage Levels Data Validity Start and Stop Conditions1 7-Bit Addressing Format Serial Data FormatsACK Using a Repeated Start Condition2 10-Bit Addressing Format Free Data FormatOperating Modes of the I2C Peripheral Operating Mode DescriptionEndianness Considerations Operating ModesI2C Peripheral Condition Basic Optional Nack Bit GenerationWays to Generate a Nack Bit Nack Bit GenerationArbitration Arbitration Procedure Between Two Master-TransmittersInitialization Reset ConsiderationsSoftware Reset Considerations Hardware Reset ConsiderationsConfiguring the I2C in Slave Receiver and Transmitter Mode Peripheral Architecture Power Management Interrupt SupportDMA Events Generated by the I2C Peripheral Emulation Considerations Inter-Integrated Circuit I2C RegistersAcronym Register Description Bit Field Value Description I2C Own Address Register IcoarI2C Own Address Register Icoar Field Descriptions OaddrAAS I2C Interrupt Mask Register IcimrI2C Interrupt Mask Register Icimr Field Descriptions SCD Icxrdy Icrrdy Ardy NackSdir I2C Interrupt Status Register IcstrI2C Interrupt Status Register Icstr Field Descriptions Sdir Nacksnt Rsfull XsmtAD0 Bit FieldAn acknowledge bit ACK has been sent by the receiver Iccl I2C Clock Divider Registers Icclkl and Icclkh1 I2C Clock Low-Time Divider Register Icclkl 2 I2C Clock High-Time Divider Register IcclkhI2C Data Count Register Iccnt I2C Data Count Register Iccnt Field DescriptionsIcdc I2C Slave Address Register Icsar Field Descriptions I2C Data Receive Register IcdrrI2C Slave Address Register Icsar I2C Data Receive Register Icdrr Field DescriptionsI2C Data Transmit Register Icdxr Field Descriptions I2C Data Transmit Register IcdxrI2C Mode Register Icmdr Field Descriptions I2C Mode Register IcmdrRM bit is dont care Bus Activity Description Icmdr BitI2C State Function of TRX Bit How the MST and FDF Bits Affect the Role of TRX Bit10 I2C Interrupt Vector Register Icivr I2C Interrupt Vector Register Icivr Field DescriptionsIntcode Ignack 11 I2C Extended Mode Register IcemdrI2C Extended Mode Register Icemdr Field Descriptions Ignack BCM R/W-0 R/W-112 I2C Prescaler Register Icpsc I2C Prescaler Register Icpsc Field DescriptionsIpsc I2C 13 I2C Peripheral Identification Register ICPID114 I2C Peripheral Identification Register ICPID2 TypeReference Additions/Modifications/Deletions Document Revision HistoryTI E2E Community Home Products ApplicationsDSP Rfid