Texas Instruments TMS320C642X manual List of Tables

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	List of Tables
1	Operating Modes of the I2C Peripheral	15
2	Ways to Generate a NACK Bit	16
3	Descriptions of the I2C Interrupt Events	21
4	Inter-Integrated Circuit (I2C) Registers	22
5	I2C Own Address Register (ICOAR) Field Descriptions	23
6	I2C Interrupt Mask Register (ICIMR) Field Descriptions	24
7	I2C Interrupt Status Register (ICSTR) Field Descriptions	25
8	I2C Clock Low-Time Divider Register (ICCLKL) Field Descriptions	28
9	I2C Clock High-Time Divider Register (ICCLKH) Field Descriptions	28
10	I2C Data Count Register (ICCNT) Field Descriptions	29
11	I2C Data Receive Register (ICDRR) Field Descriptions	30
12	I2C Slave Address Register (ICSAR) Field Descriptions	30
13	I2C Data Transmit Register (ICDXR) Field Descriptions	31
14	I2C Mode Register (ICMDR) Field Descriptions	32
15	Master-Transmitter/Receiver Bus Activity Defined by RM, STT, and STP Bits	34
16	How the MST and FDF Bits Affect the Role of TRX Bit	35
17	I2C Interrupt Vector Register (ICIVR) Field Descriptions	36
18	I2C Extended Mode Register (ICEMDR) Field Descriptions	37
19	I2C Prescaler Register (ICPSC) Field Descriptions	38
20	I2C Peripheral Identification Register 1 (ICPID1) Field Descriptions	39
21	I2C Peripheral Identification Register 2 (ICPID2) Field Descriptions	39
22	Document Revision History	40

SPRUEN0D –March 2011	List of Tables	5
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Contents Users Guide Submit Documentation Feedback Appendix a Revision HistoryList of Figures List of Tables Read This First Purpose of the Peripheral FeaturesFeatures Not Supported Industry Standards Compliance Statement Functional Block DiagramMultiple I2C Modules Connected Bus StructureClock Generation Clocking Diagram for the I2C PeripheralInput and Output Voltage Levels Signal DescriptionsClock Synchronization Data Validity Start and Stop Conditions1 7-Bit Addressing Format Serial Data Formats2 10-Bit Addressing Format Using a Repeated Start ConditionFree Data Format ACKEndianness Considerations Operating Mode DescriptionOperating Modes Operating Modes of the I2C PeripheralWays to Generate a Nack Bit Nack Bit GenerationNack Bit Generation I2C Peripheral Condition Basic OptionalArbitration Arbitration Procedure Between Two Master-TransmittersSoftware Reset Considerations Reset ConsiderationsHardware Reset Considerations InitializationConfiguring the I2C in Slave Receiver and Transmitter Mode Peripheral Architecture DMA Events Generated by the I2C Peripheral Power ManagementInterrupt Support Acronym Register Description Emulation ConsiderationsInter-Integrated Circuit I2C Registers I2C Own Address Register Icoar Field Descriptions I2C Own Address Register IcoarOaddr Bit Field Value DescriptionI2C Interrupt Mask Register Icimr Field Descriptions I2C Interrupt Mask Register IcimrSCD Icxrdy Icrrdy Ardy Nack AASI2C Interrupt Status Register Icstr Field Descriptions I2C Interrupt Status Register IcstrSdir Nacksnt Rsfull Xsmt SdirAD0 Bit FieldAn acknowledge bit ACK has been sent by the receiver 1 I2C Clock Low-Time Divider Register Icclkl I2C Clock Divider Registers Icclkl and Icclkh2 I2C Clock High-Time Divider Register Icclkh IcclIcdc I2C Data Count Register IccntI2C Data Count Register Iccnt Field Descriptions I2C Slave Address Register Icsar I2C Data Receive Register IcdrrI2C Data Receive Register Icdrr Field Descriptions I2C Slave Address Register Icsar Field DescriptionsI2C Data Transmit Register Icdxr Field Descriptions I2C Data Transmit Register IcdxrI2C Mode Register Icmdr Field Descriptions I2C Mode Register IcmdrRM bit is dont care Bus Activity Description Icmdr BitI2C State Function of TRX Bit How the MST and FDF Bits Affect the Role of TRX BitIntcode 10 I2C Interrupt Vector Register IcivrI2C Interrupt Vector Register Icivr Field Descriptions I2C Extended Mode Register Icemdr Field Descriptions 11 I2C Extended Mode Register IcemdrIgnack BCM R/W-0 R/W-1 IgnackIpsc 12 I2C Prescaler Register IcpscI2C Prescaler Register Icpsc Field Descriptions 14 I2C Peripheral Identification Register ICPID2 13 I2C Peripheral Identification Register ICPID1Type I2CReference Additions/Modifications/Deletions Document Revision HistoryDSP Products ApplicationsRfid TI E2E Community Home