Product Reference
2–21
Bi-Directional Parallel Port
The Little Board/486e CPU incorporates a standard PC bi-directional parallel port at connector
J15. This port supports two modes of operation:
! Standard PC/AT printer port (output only)
! PS/2 compatible bi-directional parallel port (SPP)
Information about parallel port configuration using SE TUP , is pro vide d in th is ch apter. The low -
level software interface to the parallel port consists of three addressable registers. The address
map of these registers is shown in Table 2–15.
Table 2–15. Parallel Port Register Map

Address

Register Name Primary Secondary

Data Port 378h 278h
Status Port 379h 279h
Control Port 37Ah 27Ah

I/O Addresses

Four I/O ports control the parallel port functions. En abling the base I /O ad dre ss pe rmits
configuration of the primary parallel port (typical ly LP T1), the se condary paralle l po rt (typ ically
LPT2), or you can disable the port to free its hardware resources for other peripherals you install
on the PC/104 bus. Table 2–16 lists the resources used by the parallel port.
Table 2–16. Parallel Port Configuration

Selection I/O Address Interrupts

Primary 378h - 37Fh IRQ 7
Secondary 278h - 27Fh IRQ 5
Disable None N/A