Cisco Systems 15310-MA 2.6 E1_21_E3_DS3_3 and E1_63_E3_DS3_3 Cards

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Cisco ONS 15310-MA SDH Reference Manual, Release 9.1 and Release 9.2
78-19417-01
Chapter 2 Card Reference
E1_21_E3_DS3_3 and E1_63_E3_DS3_3 Cards
2.6 E1_21_E3_DS3_3 and E1_63_E3_DS3_3 Cards
Note For hardware specifications, see the “A.2.5 E1_21_E3_DS3_3 and E1_63_E3_DS3_3 Cards” section on
page A-7.
The ONS 15310-MA SDH E1_21_E3_DS3_3 and E1_63_E3_DS3_3 cards provide 21 and 63
ITU-Compliant G.703 E1 ports, respectively, as well as three E3/DS3 ports. Each E1 port operates at
2.048 Mbps. Each E3/DS3 port operates at 34.368 Mbps/44.736 Mbps over a single 75-ohm 728 A or
equivalent coaxial span. These cards can operate as a working or protect card in 1:1 protection schemes.
In addition, the E1_21_E3_DS3_3 card provides retiming, so that any outgoing E1 signal can be retimed
to eliminate accumulated jitter and wander at the point of egress from a synchronous network. Any
incoming E1 signal from the transport element can also be used as a timing source.
The E1_21_E3_DS3_3 and E1_63_E3_DS3_3 cards can be installed in Slots 1, 2, 5, and 6. Card
installed in Slots 1 and 2 correspond with the electrical interface assembly (EIA) installed on Side A at
the rear of the shelf assembly, and cards in Slots 5 and 6 correspond with the EIA installed on Side B.
See the “3.2.1 1:1 Electrical Card Protection” section on page 3-2 for information about electrical card
protection and supported shelf configurations.
Figure 2-7 shows the E1_21_E3_DS3_3 and E1_63_E3_DS3_3 card faceplates and block diagram.
Figure 2-7 E1_21_E3_DS3_3 and E1_63_E3_DS3_3 Card Faceplates and Block Diagram
In E1_63_E3_DS3_3 cards, the 63 E1 ports have backplane interface connectors as shown in Figure 2-8.
Wideband Electrical Ports (WBE) E1s 1 to 28 are connected to the AMP Champ-1 connector Ports 1 to
28, WBE E1 Ports 29 to 56 to the Amp Champ-2 connector Ports 29 to 56, and WBE E1 Ports 59 to 65
to the AMP Champ-3 connector Ports 59 to 65, respectively. In AMP Champ-3, you can only use the
E1_21_
E3_DS3_3
E1_63_
E3_DS3_3
8270
CPU
Flash
4Mx16
DDR
16Mx1
6 x2
Address/
Data
Buffers
ITURI
FPGA
PSOC Power Supply
Monitor Voltages 48V->3.3V
Power Sequence 3.3V->1.5V, 1.8V, 2.5V, 2.5V
Power Shutdown 2.5V->1.2V, 1.25V
Clocks/
PLL
T1&
T3/E3
Mapper
Octal T1 LIUsx11
Temp
Sensor
DS3/E3 XFMR
& Relays
Headers
JTAG
PLD
Mictorsx4
DIRK
FPGA ENET
BP
DS3/E3
LIU
271782
FAIL
ACT/
STBY
E1 SF
DS3 SF
FAIL
ACT/
STBY
E1 SF
DS3 SF