Cisco Systems 15310-MA 2-14, Figure 2-6 shows the ML-100T-8 card faceplate and block diagram.

2-14
Cisco ONS 15310-MA SDH Reference Manual, Release 9.1 and Release 9.2
78-19417-01
Chapter 2 Card Reference
ML-100T-8 Card
Figure 2-6 shows the ML-100T-8 card faceplate and block diagram.
Figure 2-6 ML-100T-8 Card Faceplate and Block Diagram
The following paragraphs describe the general functions of the ML-100T-8 card and relate to the block
diagram in Figure 2-6.
In the ingress direction (Ethernet-to-SDH), Ethernet frames first enter from a physical Ethernet port to
one of the corresponding channels of the octal PHY, which performs all of the physical layer interface
functions for 10/100 Ethernet. The PHY sends the Ethernet frame to the packet processor by means of
the SMII interfaces for queuing in the respective packet buffer memory. The packet processor performs
packet processing, packet switching, and classification. The Ethernet frames are then passed on to the
POS mappers through the SMII interfaces. The POS mappers terminate the 10/100-Mbps Ethernet
traffic. The Ethernet frames are extracted and buffered in POS mapper external memory. Ethernet frames
are encapsulated using one of the framing protocols (PPP/HDLC or GFP), selected on a per-port basis.
The encapsulated Ethernet frames are mapped into a configurable number of VC3 or VCAT low-order
payloads (VC3-1v or VC3-2v). The SPE from each POS mapper (up to VC4) carrying encapsulated
Ethernet frames are next passed onto the mux/demux, where the VC4 frames from both POS mappers
are multiplexed to form an VC4-4c frame for transport over the SDH network by means of the BTC-48
ASIC.
134591
ML-100T-8
Console
ACTIVE
FAIL
LINK
0
ACT
LINK
1
ACT
LINK
2
ACT
LINK
3
ACT
LINK
4
ACT
LINK
6
ACT
LINK
5
ACT
LINK
7
ACT
Packet Buffer
1.5MB
Control Mem
0.5MB
nP3400
SMII
SMII
8 x
RJ45
4
32MB
eMDM
STS12
STS-3
STS-3
60x
Part of eMDM FPGA
1
MII
155MHz77MHz
19.44MHz
FCC3 MPC8270
FCC1FCC2
MIIMII
Payload
SCL
CPLD
BTC48
8
6
SMII
8
4
BMC5228
Octal PHY
Option 2
SDRAM
8 MB Ethermap
#2
SDRAM
8MB
Ethermap
#1
eMDM
FPGA
B
a
c
k
p
l
a
n
e
Intercard
Ethernet Links
INTEL
LXT973
PHY
Flash
8MB
SDRAM
128MB
Option 1