![](/images/new-backgrounds/1190657/190657137x1.webp)
Chapter 2 Card Reference
Figure 2-4 shows the CE-MR-6 card faceplate and block diagram.
Figure 2-4 CE-MR-6 Faceplate and Block Diagram
CE-MR-6
FAIL ACT
STBY
1 | 2 |
3 | 4 |
100FX/
SGMII
SERDES
SFP |
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BCM5482S | |||||
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SFP |
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SFP |
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| BCM5482S | |
SFP |
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| Dual PHY | |
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SFP |
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| BCM5482S | |
SFP |
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| Dual PHY | |
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2
RGMII
2
RGMII
2
RGMII
IXF1012
10G MAC
| VCAT |
Packet Processing Engine | Memory |
16Mx36 |
RLDRAM2
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| (hstl) | Main 2.5 Gbps |
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| (lvds) |
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| Protect 2.5 Gbps | |
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| FCC1 | Super |
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| Carrera | SCL |
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MP3 |
| ASIC |
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| Intercard | ||
FPGA |
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| FE |
| Packet Mem |
| BCM5325M | Main |
| 1Mx36x8 |
| Intercard | |
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| FE SW | ||
| RLDRAM2 |
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(htsl) |
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| FE | |
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| SCL | FCC2 | Protect |
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B
a
c k p l a n e
1
Control
Engine
MPC8555E
256MB DDR1 SDRAM
128MB FLASH
8KB NVRAM
159725
2
3
4
5
6
Cisco ONS
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