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| Interface Information |
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Pin | Direction | Signal | Description |
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33 |
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| 0 volts. Same as pins 14, |
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34 |
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| Not used |
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35 |
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| Not used |
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36 |
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| Not used |
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IEEE 1284-B Nibble Mode signals
The following table briefly gives connector pin assignments in IEEE 1284 mode.
Pin | Direction | Signal | Description |
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1 | To printer | HostClk | High in reverse data transfer phase |
2 | To printer | DATA BIT 1 |
3 | To printer | DATA BIT 2 |
4 | To printer | DATA BIT 3 |
5 | To printer | DATA BIT 4 |
6 | To printer | DATA BIT 5 |
7 | To printer | DATA BIT 6 |
8 | To printer | DATA BIT 7 |
9 | To printer | DATA BIT 8 |
These signals are the 1st to the 8th bits of parallel data.
These signals are active high for a logical 1.
10 | From printer | PtrClk | Set to low to qualify data on reverse channel |
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11 | From printer | PtrBusy | Reverse channel: Data 3 and 7 |
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12 | From printer | AckDataReq | Reverse channel: Data 2 and 6 |
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13 | From printer | Xflag | Reverse channel: Data 1 and 5 |
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14 | To printer | Host Busy | Set to low to indicate the host can receive |
data |
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| Set to high Host Acknowledge Receipt |
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15 |
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| Not used |
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16 |
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| 0 volts. Logic ground |
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17 |
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| Chassis ground |
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18 | From printer | Peripheral Logic Set to high to indicate the printer is ON | |
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| High | and all signals are in valid state. |
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| - Max output current 50 mA |
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| 0 volts. Signal ground | |
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30 |
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| 0 volts. Signal ground |
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