S1F76300 Series
Output voltage adjustment
To ensure stable output, any circuit that adjusts the output voltage must contain C1, RA and RB. To stop switching current from affecting VO, the circuit must also satisfy the condition IO < IR.
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| voltage |
VSW |
| output |
| RA | |
VI | VO | IO |
| ||
|
| IR |
|
| CL |
GND
C RB
(IO < IR)
Voltage adjustment
circuit
The following figure summarizes the relevant circuits inside an S1F70000 series chip.
VO is connected to the level shift and buffer circuit, which provide the gate bias for the switching transistor driving the inductor. The current drain IO1, varies with the load and is typically 10μA. The current, IO2, through the internal resistors R1 and R2 is typically 1μA.
VI
|
| IO1 | IO |
VSW |
| IO2 | VO |
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| |
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| Comparator | R1 |
| Level | Controller |
|
| shifter |
| |
Buffer |
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| |
| VREF | R2 | |
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S1F76300 | Series |
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S1F70000 Series Technical Manual
EPSON |