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MPB3052AT, MPB3054AT, MPB3032AT, MPB3021AT, MPB3043AT
manual
Models:
MPB3043AT
MPB3021AT
MPB3052AT
MPB3032AT
MPB3054AT
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180 pages
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Specs
Install
MPB30xxAT Block diagram
PR4 signal transfer
Factory default setting
Dimension
drives configuration
Reset
Diagnostic code
Command block registers
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Contents
C141-E045-02EN
Revision Record
Page
Chapter
Preface
Conventions for Alert Messages
Liability Exception
Page
Contents
Interface
Theory of Device Operation
Page
Operations
Figures
Page
Tables
Page
Device Overview
Features Functions and performance
Interface
Adaptability
Page
Specifications
Device Specifications Specifications summary
Model names and product numbers
Model and product number
Current and power dissipation
Current fluctuation Typ. when power is turned on
Acoustic noise specification
Shock and vibration specification
Error Rate
Disk drive outerview
Device Configuration System Configuration
Page
MPB3043AT Model
Configuration of disk media heads
2 1 drive connection
System Configuration ATA interface
3 2 drives connection
2 drives configuration
Page
Dimensions Mounting Cable Connections Jumper Settings
Installation Conditions
Dimensions
Orientation
PCA
Limitation of side-mounting
Page
Service area
ATA
Cable Connections Device connector
Device connection
Cable connector specifications
Specters Strip
AMP
+12V Return +5V Return
Power supply connector CN1
CN1
11 Factory default setting Jumper configuration
Factory default setting
14 Example 1 of Cable Select
13 Jumper setting of Cable Select
092
Disk
Outline
MPB 3052AT M odel
Head
MPB3064AT Model
Actuator
Spindle
Air filter
Circuit Configuration
MPB30xxAT Block diagram
Power-on Sequence
Power-on operation sequence
Self-calibration contents
Command processing during self-calibration
Self-calibration execution timechart
Write circuit
Read/write preamplifier PreAMP
Write precompensation algorithm
Read/write circuit block diagram
Read circuit
Frequency characteristic of programmable filter
PR4 signal transfer
Time base generator circuit
Write clock frequency and transfer rate of each zone
Servo control circuit
Physical sector servo configuration on disk surface
Page
Servo frame format
Data-surface servo format
PAD
Actuator motor control
Spindle motor control
Page
Interface
Shows the interface signals Host
Physical Interface Interface signals
Dasp
Signal assignment on the connector
Signal assignment on the interface connector
Reset
Pidag
Dior
Hdmardy
Hstrobe
Ddmardy
Iordy
1 I/O registers
DA2 DA1 DA0
I/O registers
Icrc UNC Idnf Abrt TK0NF Amnf
Command block registers
Page
DEV HS3 HS2 HS1 HS0
BSY Drdy DSC DRQ ERR
Page
Srst
Control block registers
Command code and parameters 1
Command code and parameters
Standby Immediate Sleep Check Power Mode Smart Flush Cache
Command code and parameters 2
LBA
Command descriptions
LBA LSB
LBA LSB
Read Multiple XC4
BSY Drdy Intrq DRQ
Execution example of Read Multiple command
LBA LSB
LBA
LBA
Write Multiple XC5
LBA LSB
Write Verify X3C
LBA LSB
1F4 HCL Cylinder No. LSB / LBA 1F3 HSN Sector No
Identify Device XEC
Initialize Device Parameters
Page
Information to be read by Identify Device command 1
Information to be read by Identify Device command 2
Information to be read by Identify Device command 3
Identify Device DMA XEE
SET Features XEF
‘CC’
Features register values and settable modes
‘AA’
‘BB’
SET Multiple Mode XC6
Page
Diagnostic code
Page
1F7 HCM 1F6 HDH Head No. /LBA MSB 1F5 HCH Cylinder No. MSB
LBA
Write Buffer XE8
Page
Page
Page
Page
XFF
Page
’DA’
Features Register values subcommands and functions
Page
1FE 1FF
Format of device attribute value data
Format of insurance failure threshold value data
Page
Page
Page
10 Command code and parameters
Error posting
Data transferring commands from device to host
∙ Execute Device Diagnostic ∙ Initialize Device Parameters
IOR
BSY
Drdy DRQ Intrq
DRQ Intrq
BSY Drdy DRQ Intrq
Write Sectors command protocol
BSY Drdy Intrq
Commands without data transfer
∙ Read DMA ∙ Write DMA
Other commands
DMA data transfer commands
∙ Read Multiple ∙ Sleep ∙ Write Multiple
IOW
DRQ Dmarq Dmack
Ultra DMA feature set Overview
Phases of operation
Data in transfer
Pausing an Ultra DMA data in burst
Terminating an Ultra DMA data in burst
Page
Page
Data out transfer
Pausing an Ultra DMA data out burst
Terminating an Ultra DMA data out burst
Page
Ultra DMA CRC rules
DIOW-STOP
Series termination required for Ultra DMA
11 Recommended series termination for Ultra DMA
DIOR-HDMARDY-HSTROBE
Timing PIO data transfer
IOCS16 Iordy
DIOR-/DIOW
Dmarq Dmack DIOR-/DIOW
Single word DMA data transfer
Multiword data transfer
11 Multiword DMA data transfer timing mode
12 Initiating an Ultra DMA data in burst
Ultra DMA data transfer
Dmardy
NAM Mode Comment MIN MAX
12 Ultra DMA data burst timing requirements 2
13 Sustained Ultra DMA data in burst
Sustained Ultra DMA data in burst
14 Host pausing an Ultra DMA data in burst
Host pausing an Ultra DMA data in burst
15 Device terminating an Ultra DMA data in burst
Device terminating an Ultra DMA data in burst
16 Host terminating an Ultra DMA data in burst
Host terminating an Ultra DMA data in burst
17 Initiating an Ultra DMA data out burst
18 Sustained Ultra DMA data out burst
Sustained Ultra DMA data out burst
19 Device pausing an Ultra DMA data out burst
Device pausing an Ultra DMA data out burst
20 Host terminating an Ultra DMA data out burst
Host terminating an Ultra DMA data out burst
21 Device terminating an Ultra DMA data out burst
BSY Dasp
Power-on and reset
Pdiag Dasp
Operations
Response to power-on
Response to hardware reset
Response to software reset
Response to diagnostic command
MPB
Default parameters
LS1 LH1 LH2 LS2
Logical address
LS1
LH0
LBA0 LBA1 LBA2
Power save mode
Page
Power commands
Alternating defective sectors
Spare area
Alternate cylinder assignment
Data buffer configuration
∙ Read Sector S ∙ Read Multiple ∙ Read DMA
Caching operation
Write DMA, Write Multiple
Usage of read segment
∙ Write Sectors ∙ Write DMA ∙ Write Multiple
DAP
HAP
Mis-hit data Empty data
Read-ahead data
HAP
HAP set to hit position for data transfer
Partially hit data Lack data
Write Cache
∙ Write Sectors ∙ Write Multiple ∙ Write DMA
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