IBM eServer zSeries 990 Technical Guide
Page
IBM eServer zSeries 990 Technical Guide
This document created or updated on April 7
Second Edition April
Iii
Iv IBM eServer zSeries 990 Technical Guide
Contents
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Appendix B. Fiber optic cabling services
6947spec.fm
Trademarks
Eckd
Team that wrote this redbook
First Edition authors
Become a published author
Comments welcome
IBM zSeries 990 overview
Balanced system design
Introduction
Escon
General rules
Model upgrade paths
Z990 models
Model downgrades
System functions and features
Processor
Concurrent Processor Unit PU conversions
Channel Subsystem CSS
Memory
Self-Timed Interconnect STI
Physical Channel IDs PCHIDs and Chpid Mapping Tool
Spanned channels
7 I/O connectivity
Cage
Up to 1024 Escon channels
Up to 120 Ficon Express channels
Ficon CTC function
Ficon Cascaded Directors
Gigabit Ethernet
Checksum Offload for Linux and z/OS when Qdio mode
OSA-Express
1000BASE-T Ethernet
Token Ring
Cryptographic CP Assist for cryptographic function
Parallel channels and converters
OSA-Express ATM
Parallel Sysplex support
PCI Cryptographic Accelerator feature Pcica
PCI X-Cryptographic Coprocessor Pcixcc feature
ICB-4 Integrated Cluster Bus
ICB-2 Integrated Cluster Bus
ICB-3 Integrated Cluster Bus
Internal Coupling IC
Intelligent Resource Director IRD
Hardware consoles
Customer Initiated Upgrade CIU
Concurrent upgrades
Capacity Upgrade on Demand CUoD
On/Off Capacity Upgrade on Demand On/Off CoD
Performance
32 CPS
Reliability, Availability, Serviceability RAS
Software
ZSeries File System zFS
Unix System Services
Traditional database/transaction workloads
Linux on zSeries and Linux for S/390
Software support
Compatibility and exploitation
OS/390 & z/OS
VSE
Software pricing
Linux
Summary
System structure and design
System structure
Book concept
Power
Cooling
Models
Hybrid cooling system
Memory Sizes
New build 2084 physical memory card distribution
Ring Topology
Memory upgrades
Book replacement and memory
Memory sparing
MCM
Connectivity
MCM
Book upgrade
STI connectors Book front view
Book replacement and connectivity
Frames and cages
Cages
Frame
MCM
Capacitors
SD chip
PU, SC, and SD chips
SC chip
System design
IBM 2084-A08 IBM 2084-B16 IBM 2084-C24 IBM 2084-D32
Design highlights
Book design
12 Logical book structure
Superscalar processor
Processor Unit design
Dual External Time Reference
Asymmetric mirroring for error detection
Compression Unit on a chip
CP Assist for Cryptographic Function
Processor Branch History Table BHT
Without BHT With BHT
Instruction fetching and instruction decode
Ieee Floating Point
Translation Lookaside Buffer
Instruction grouping
Processor unit functions
Central Processors
Integrated Facilities for Linux
Dynamic Coupling Facility Dispatching
Internal Coupling Facilities
Dynamic ICF Expansion
Purpose of a zAAP
ZSeries Application Assist Processors
ZAAPs and Lpar definitions
Optional additional orderable SAPs
System Assist Processors
Software support
Optionally assignable SAPs
Reserved processors
Processor unit characterization
Dynamic SAP sparing and reassignment
Transparent CP, IFL, ICF, zAAP, and SAP sparing
Application preservation
Sparing rules
Memory design
Dynamic Memory sparing
Memory allocation
Partial Memory Restart
Lpar single storage pool
Central storage CS
Expanded storage ES
Modes of operation
Hardware System Area HSA
Logical Partitioning overview
VSE/ESA
Processors
Memory
Channels
Logically Partitioned Mode
Model configurations
Dynamic Add/Delete of a logical partition name
Unassigned IFL
Upgrades
Unassigned CP
ZAAP
Software models
Z990 Models 2084-A08 2084-B16 2084-C24 2084-D32
PU conversions
Z990 Models Software
Software model MSU values
From
Hardware Management Console and Support Elements
Software MSU/ Pricing Model
Storage operations
Definition Definable
ESA/390 mode
Operating
Linux Only mode
ESA/390 TPF mode
Coupling Facility mode
Architecture mode
Reserved storage
Lpar storage granularity
Lpar Dynamic Storage Reconfiguration DSR
12 I/O subsystem
Physical Channel ID Pchid
Channel Subsystem
Logical Channel Subsystem Lcss
Cage Front Pchid ## Rear Pchid ##
O system structure
Overview
I/O cages
CEC Cage 1st I/O Cage standard
Board
Domain Slots in domain
STIs and I/O cage connections
Z990 Model Number of books Number of MBAs Number of STIs
ESTI-M card
Cage
STI-3 Extender card
Balancing I/O connections
STI-2 Extender card
Book
STI links balancing across books and MBAs
2084-B16 CEC Cage
STI Links Cards
STI Rebalance feature Feature Code
2084-D32 CEC Cage
Upgrade example with the STI Rebalance feature FC
Cage
Port balancing across MBAs and books
STIs
Feature cards no longer supported
I/O and cryptographic feature cards
1 I/O feature cards
Card types Feature Codes FC
Cryptographic card types Feature Codes FC
Cryptographic feature cards
Cryptographic feature card no longer supported
Physical Channel IDs PCHIDs
PCHIDs 121 131 Slots
Pchid Report example
CEC cage book Pchid numbers
Connectivity
Z990 Chipd Mapping Tool CMT
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Spanned and Shared channels
Features cables and connectors
Feature code Feature name Connector type Cable type
Z990 16-port Escon feature
Escon channel
Escon channel port enablement feature
Fiber Quick Connect FQC for Escon Quick Connect
Port Escon channel sparing
Ficon channel
Ficon Express features
Ficon Express LX feature
Z990 adapter interruptions enhancement for FCP
Ficon channel in Fibre Channel Protocol FCP mode
Ficon Express SX feature
Z990 FCP concurrent patch
Z990 FCP Scsi IPL feature enabler FC
OSA-Express adapter
OSA-Express GbE LX feature code 2364, upgrade only
OSA-Express GbE LX feature code
OSA-Express GbE SX feature code
OSA-Express GbE SX feature code 2365, upgrade only
OSA-Express 1000BASE-T Ethernet feature code
OSA-Express Fast Ethernet feature code 2366, upgrade only
OSA-Express Integrated Console Controller OSA-ICC
Checksum offload for IPv4 packets when in Qdio mode
OSA-Express Token Ring feature code
Z990 adapter interruptions enhancement for Qdio
Z990 coupling link features
Coupling Facility links
HiperSockets function
ISC-3 link
RPQ 8P2197 Extended distance option
ICB-2 link
ICB-4 link
ICB-3 link
Mode
Z990 ICB links summary
External Time Reference ETR feature
IC links
PCI Cryptographic Accelerator Pcica feature
Cryptographic features
Pcix Cryptographic Coprocessor Pcixcc feature
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Channel Subsystem
109
Multiple Logical Channel Subsystem Lcss
Logical Channel Subsystem structure
Multiple Image Facility MIF
Logical partition number
Logical partition name
Logical partition identifier
MIF Image ID Mifid
Logical Partition ID
Physical Channel ID Pchid
Dynamic Addition or Deletion of a logical partition name
Channel spanning
Z990 Lcss connectivity
Hardware Configuration Dialog HCD
Lcss configuration management
IBM Configurator for e-business e-Config
1 z990 configuration management
IBM z990 Chpid Mapping Tool CMT
LCSS-related numbers
Z990
6947ch04.fm
Cryptography
119
Cryptographic Asynchronous functions
Cryptographic function support
Cryptographic Synchronous functions
Cryptography
Z990 Cryptographic processors
CP Assist for Cryptographic Function Cpacf
Pcix Cryptographic Coprocessor Pcixcc
PCI Cryptographic Accelerator Pcica feature
Crypto
Cryptographic hardware features
Pcix Cryptographic Coprocessor feature
Pcica feature
Configuration rules
4 z990 cryptographic feature codes
Functions or Attributes
Cryptographic features comparison
TKE workstation feature
Software requirements
Private keys Public Key Encrypt PKE support for MRP function
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Operating system
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Software support
133
Compatibility support for z/OS
Operating system support
Z/OS software support
Z990 Compatibility for selected OS/390, and z/OS releases
Compatibility support requirements
Compatibility support restrictions
Z990
Exploitation support for z/OS
OS V1.4 z990 Compatibility Support feature
OS V1.4 z990 Exploitation Support feature
OS V1.5 Support
ZSeries Application Assist Processor zAAP
Dynamic addition and deletion of a logical partition name
Processors within a single logical partition
JVM
SMF support
HCD support
Automation changes
RMF support
Ickdsf requirements
Standalone dump
Icsf support
Additional exploitation support considerations
Automation
D M=CPU command output
Switch ID =
Extended Channel Measurement Block
Dynamic Chpid management
Z/VM software support
Dynamic activates for hardware changes
Greater than 15 logical partitions
Linux software support
Z/VSE and VSE/ESA software support
TPF software support
Software Requirements OS/390 V1.6 a
Summary of software requirements
Summary of z/OS and OS/390 software requirements
V1.4
V5.1 V4.4 V3.1
Software Requirements
Linuxon
V4.1
OSA-ICC
Workload License Charges
Version CPU identification number Machine Code Type number
Concurrent upgrades considerations
Processor Identification
Channel to Channel links
Sysplex functions
153
Sysplex LPARs CF02
Parallel Sysplex
Parallel Sysplex described
Sysplex LPARs
Dynamic workload balancing
Continuous application availability
High capacity
Systems management
Resource sharing
Single system image
Parallel Sysplex summary
Sysplex configurations and Sysplex Timer considerations
Sysplex and Coupling Facility considerations
Message Time Ordering
6947ch07.fm
Example 7-1 Display ETR
Coupling Facility and Cfcc considerations
Cfcc enhanced patch apply
Cflevel
Minimum software levels a
Coupling Facility link connectivity
Link Type Z990 Max
Peer mode links
Link Type Z990 Max Maximum number of links per z990
ICF processor assignments
Meaning of Partition
Function Setup
Dynamic CF dispatching and dynamic ICF expansion
Z990 Dynamic CF Dispatching shared CPs or shared ICF PUs
System-managed CF structure duplexing
Benefits
Configuration planning
CF Structure Duplexing
Z800/z900/z990/z890/G5/G6z800/z900/z990/z890/G5/G6
Geographically Dispersed Parallel Sysplex
GDPS/PPRC
GDPS/PPRC HyperSwap
ZSeries
Planned HyperSwap
Unplanned HyperSwap
Gdps FlashCopy V2 support
GDPS/PPRC Management for Open Systems LUNs
GDPS/PPRC over Fiber Channel links
Business Continuity for Linux guests
GDPS/XRC
Site
Gdps and Capacity Backup CBU
Recovery
Application
Intelligent Resource Director
IRD overview
Lpar CPU management
Dynamic Channel Path Management
Value of CPU management
Value of Dynamic Channel Path Management
Channel Subsystem Priority Queueing
Workload type Priority
WLM and Channel Subsystem priority
Value of Channel Subsystem Priority Queueing
Unique Lpar cluster names
Automatic I/O interface reset
Special considerations and restrictions
Disabling Dynamic Channel Path Management
References
System automation I/O operations
6947ch07.fm
Capacity upgrades
185
Concurrent hardware installation upgrades
Concurrent upgrades
Licensed Internal Code LIC-based upgrades
Concurrent PU conversions
Model upgrades
Planned upgrades
Capacity upgrade functions
Capacity Upgrade on Demand CUoD
Unplanned upgrades
Function Upgrades Via Type Process
6947ch08.fm
CUoD for processors
CUoD + 1 CP + 2 IFLs
CUoD for memory
CUoD + 16 GB + Model upgrade
CUoD for I/O
+ 8 Escon
Customer Initiated Upgrade CIU
Plan Ahead concurrent conditioning
CIU Registration and Agreed Contract for CIU
Internet
Order and fulfillment process
Ordering
CIU order example
Activation
Z990 Model Conversion screen
CIU upgrade selection screen
On/Off Capacity on Demand On/Off CoD
6947ch08.fm
Initiation
Activation/Deactivation
Termination
Software
Capacity BackUp CBU
Upgrade Capability during On/Off CoD
Repair capability during On/Off CoD
6947ch08.fm
CBU activation
Image upgrades
Activation/deactivation of CBU
CBU testing
Capacity BackUp operation example
Automatic CBU enablement for Gdps
CBU deactivation
Nondisruptive upgrades
Processors
PCI Cryptographic coprocessors
Upgrade scenarios
Memory
Shared logical partitions upgrade
LP1 LP2
Dedicated and shared logical partitions upgrade
LP1 LP2 LP3
Shared partitions and zAAP upgrade
Dedicated, shared partitions and IFL upgrade
LP1 LP2
Dedicated, shared partitions and ICF upgrade
LP2
Planning for nondisruptive upgrades
Reasons for disruptive upgrades
Recommendations to avoid disruptive upgrades
Considerations when installing additional books
Capacity planning considerations
Balanced system design
Additional performance improvements for e-business
Multi-book structure
16 shows a two-book z990 server logical view
Book
Superscalar processors
Cryptographic function on every Processor Unit PU
Integrated hardware and system assists
ZSeries Application Assist Processors zAAPs
Secure encrypted transactions with higher performance
Capacity measurements
Performance assists for Linux and z/VM
Large Systems Performance Reference Lspr
Internal Throughput Rate ITR and ITR Ratio Itrr
Operating system Workload type Workload description
Lspr workloads prior to z990
Lspr workloads for z990
Lspr workloads for z990 Lpar Mode
6947ch08.fm
New predefined z/OS workload mixes
OLTP-T
Z990 Lspr tables
Environmentals
229
Internal Battery Feature
Power and cooling requirements
Power consumption
Configuration
Weights
Emergency power-off
Cooling requirements
Dimensions
Frames Width mm Depth mm Height mm
Appendix A. Hardware Management Console HMC
233
LAN
Z990 Hardware Management Console
LAN
Token ring only wiring scenario
Token-Ring LAN
Ethernet only one-path wiring scenario
Additional token ring only wiring scenario
Figure A-5 Ethernet only one path wiring scenario
Additional connections to the Ethernet LAN
Ethernet only two-path wiring scenario
Figure A-7 Ethernet only two-path wiring scenario
Token ring and Ethernet wiring scenario
Remote operations
Additional connections to the Token Ring LAN
Z990 HMC Integrated 3270 Console
Support Element
Z990 HMC enhancements
Enhanced logging facilities
Optional strict password rules supported
Z990 HMC Integrated Ascii Console support
Increased Console tasks performed log
SNA Operations Management for Operations Automation
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Appendix B. Fiber optic cabling services
247
Fiber optic cabling services from IBM
Summary
249
6947axB.fm
251
IBM Redbooks
Other publications
How to get IBM Redbooks
Online resources
Glossary
253
EMIF. See Escon Multiple Image Facility
ESA/390. See Enterprise Systems Architecture/390
Fiber optic cable. See optical cable
IPL. See initial program load
Fiber
PTF. See program temporary fix
6947glos.fm
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IBM eServer zSeries 990 Technical Guide
IBM eServer zSeries Technical Guide
Index
263
GDPS/PPRC
Pcicc
SAP
Page
IBM eServer zSeries 990 Technical Guide