Draft Document for Review April 7, 2004 6:15 pm

6947ch08.fm

Important: The CBU capability can coexist with On/Off CoD enablement. Both CBU and On/Off CoD LIC-CC can be installed on a z990 server, but the CBU activation and On/Off CoD activation are mutually exclusive.

CBU can only add CPs to an existing z990 server, but note that CPs can assume any kind of workload that could be running on IFLs, zAAPs, and ICF processors at the failed system or systems. z/VM, Linux, Java code and CFCC (for Coupling Facility partitions) can also run on CPs.

When the CBU activated capacity is no longer required, its removal is nondisruptive. If CBU is activated on a z990 server, other hardware upgrades/MES are restricted. With exception of memory and channels, LIC-CC enabled features such as CPs, ICFs, IFLs, and zAAPs can be ordered but not enabled, until the CBU upgrade is deactivated.

The CPs that can be activated by CBU come from the available spare PUs on any installed book of the designated z990 server. So the number of CBU features (FC 7800), one for each “stand-by” CP, that can be ordered is limited by the number of spare PUs on the server. Some examples:

￿A 2084-B16 server with 8 CPs (no IFLs, ICFs, or zAAPs) has 8 available spare PUs available; this server can have up to 8 CBU features.

￿A 2084-B16 server with 8 CPs and 2 zAAPs (no IFLs or ICFs) has 6 available spare PUs available; this server can have up to 6 CBU features.

￿A 2084-C24 server with 12 CPs, 2 IFLs and 1 ICFs has 9 available spare PUs available; this server can have up to 9 CBU features.

Note that CBU can add CPs via LIC-CC only and the z990 server must have the proper number of books installed to allow the required upgrade by LIC-CC. CBU changes the server’s software model (3xx) but cannot change the z990 server model (2084-xxx).

A CBU contract must be in place before the special code that enables this capability can be loaded on the customer’s server. CBU features can be added to an existing z990 server nondisruptively.

The installation of the CBU code provides an alternate configuration that can be activated in the face of an actual emergency. Five CBU tests lasting up to 10 days each, and one CBU activation lasting up to 90 days for a real disaster/recovery, are usually allowed in each CBU contract.

A CBU system normally operates with a “base”PU configuration having a pre-configured number of additional spare PUs reserved for activation as CPs in case of an emergency. One CBU feature is required for each “stand-by” CP that can beactivated. A CBU activation enables the total number of CBU features installed.

The base CBU configuration must have sufficient memory and channels to accommodate the potential needs of the large CBU target server. When capacity is needed in an emergency, the customer can activate the emergency CBU configuration with the reserved spare PUs added into the configuration as CPs. It is very important to ensure that all required functions are available on the “backup”server(s), including CFLEVELs for Coupling Facility partitions, as well as cryptographic and connectivity capabilities.

This upgraded configuration is activated temporarily and provides additional CPs above and beyond the server’s original, permanent configuration. The number of additional CPs is

predetermined by the alternate configuration, which has been stated in the CBU contract.

Chapter 8. Capacity upgrades 205

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IBM 990 manual 6947ch08.fm

990 specifications

The IBM 990 series, often referred to in the context of IBM's pioneering efforts in the realm of mainframe computing, represents a unique chapter in the history of information technology. Introduced in the late 1960s, the IBM 990 series was designed as a powerful tool for enterprise-level data processing and scientific calculations, showcasing the company's commitment to advancing computing capabilities.

One of the main features of the IBM 990 was its architecture, which was built to support a wide range of applications, from business processing to complex scientific computations. The system employed a 32-bit word length, which was advanced for its time, allowing for more flexible and efficient data handling. CPUs in the IBM 990 series supported multiple instructions per cycle, which contributed significantly to the overall efficiency and processing power of the machines.

The technology behind the IBM 990 was also notable for its use of solid-state technology. This provided a shift away from vacuum tube systems that were prevalent in earlier computing systems, enhancing the reliability and longevity of the hardware. The IBM 990 series utilized core memory, which was faster and more reliable than the magnetic drum memory systems that had been standard up to that point.

Another defining characteristic of the IBM 990 was its extensibility. Organizations could configure the machine to suit their specific needs by adding memory, storage, and peripheral devices as required. This modular approach facilitated the growth of systems alongside the technological and operational demands of the business environments they served.

In terms of software, the IBM 990 series was compatible with a variety of operating systems and programming environments, including FORTRAN and COBOL, enabling users to access a broader array of applications. This versatility was a significant advantage, making the IBM 990 an appealing choice for educational institutions, research facilities, and enterprises alike.

Moreover, the IBM 990 was engineered to support multiprocessing, which allowed multiple processes to run simultaneously, further increasing its effectiveness in tackling complex computing tasks.

In summary, the IBM 990 series represents a significant advancement in computing technology during the late 20th century. With a robust architecture, versatile configuration options, and a focus on solid-state technology, the IBM 990 facilitated substantial improvements in data processing capabilities, making it a cornerstone for many businesses and academic institutions of its time. Its impact can still be seen today in the continued evolution of mainframe computing.