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Draft Document for Review April 7, 2004 6:15 pm

Additional SAPs are characterized first, then CPs, followed by IFLs, ICFs and zAAPs. For performance reasons, CPs for a logical partition are grouped together as much as possible. Having all CPs grouped in as few books as possible limits memory and cache interference to a minimum.

When an additional book is added concurrently after Power-on Reset and new logical partitions are activated, or processor capacity for active partitions is dynamically expanded, the additional PU capacity may be assigned from the new book. It is only after the next Power-on Reset that the processor unit allocation rules take into consideration the newly installed book.

Note: Even in a multi-book system, a book failure is a CPC system failure. Until the failing book is repaired or replaced, Power-On Reset of the z990 with the remaining books is not supported.

Transparent CP, IFL, ICF, zAAP, and SAP sparing

Characterized PUs, whether CPs, IFLs, ICFs, zAAPs or SAPs, are transparently spared, following distinct rules.

The z990 server comes with 2, 4, 6, or 8 standard spare PUs, depending on the model. CP, IFL, ICF, zAAP, and SAP sparing is completely transparent and requires no operating system or operator intervention.

With transparent sparing, the application that was running on the failed processor is preserved and will continue processing on a newly assigned CP, IFL, ICF, zAAP, or SAP (allocated to one of the spare PUs), without customer intervention. If no spare PU is available, Application Preservation is invoked.

Application preservation

Application preservation is used in the case where a processor fails and there are no spare PU available. The state of the failing processor is passed to another active processor used by the operating system and, through operating system recovery services, the task is resumed successfully— in most cases wi thout customer intervention.

Dynamic SAP sparing and reassignment

Dynamic recovery is provided in case of failure of the System Assist Processor (SAP). In the event of a SAP failure, if a spare PU is available, the spare PU will be dynamically assigned as a new SAP. If there is no spare PU available, and more than one CP is characterized, a characterized CP is reassigned as a SAP. In either case, there is no customer intervention required. This capability eliminates an unplanned outage and permits a service action to be deferred to a more convenient time.

Sparing rules

The sparing rules for the allocation of spare CPs, IFLs, ICFs, zAAPs, and SAPs depend on the type of processor chip on which the failure occurs. On each MCM, two standard spare PUs are available. The two standard SAPs and two standard spares are initially allocated to dual core processor chips. Table 2-3 illustrates the default PU-to-chip mapping.

52IBM eServer zSeries 990 Technical Guide

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IBM 990 Transparent CP, IFL, ICF, zAAP, and SAP sparing, Application preservation, Dynamic SAP sparing and reassignment

990 specifications

The IBM 990 series, often referred to in the context of IBM's pioneering efforts in the realm of mainframe computing, represents a unique chapter in the history of information technology. Introduced in the late 1960s, the IBM 990 series was designed as a powerful tool for enterprise-level data processing and scientific calculations, showcasing the company's commitment to advancing computing capabilities.

One of the main features of the IBM 990 was its architecture, which was built to support a wide range of applications, from business processing to complex scientific computations. The system employed a 32-bit word length, which was advanced for its time, allowing for more flexible and efficient data handling. CPUs in the IBM 990 series supported multiple instructions per cycle, which contributed significantly to the overall efficiency and processing power of the machines.

The technology behind the IBM 990 was also notable for its use of solid-state technology. This provided a shift away from vacuum tube systems that were prevalent in earlier computing systems, enhancing the reliability and longevity of the hardware. The IBM 990 series utilized core memory, which was faster and more reliable than the magnetic drum memory systems that had been standard up to that point.

Another defining characteristic of the IBM 990 was its extensibility. Organizations could configure the machine to suit their specific needs by adding memory, storage, and peripheral devices as required. This modular approach facilitated the growth of systems alongside the technological and operational demands of the business environments they served.

In terms of software, the IBM 990 series was compatible with a variety of operating systems and programming environments, including FORTRAN and COBOL, enabling users to access a broader array of applications. This versatility was a significant advantage, making the IBM 990 an appealing choice for educational institutions, research facilities, and enterprises alike.

Moreover, the IBM 990 was engineered to support multiprocessing, which allowed multiple processes to run simultaneously, further increasing its effectiveness in tackling complex computing tasks.

In summary, the IBM 990 series represents a significant advancement in computing technology during the late 20th century. With a robust architecture, versatile configuration options, and a focus on solid-state technology, the IBM 990 facilitated substantial improvements in data processing capabilities, making it a cornerstone for many businesses and academic institutions of its time. Its impact can still be seen today in the continued evolution of mainframe computing.