Draft Document for Review April 7, 2004 6:15 pm

 

 

6947ch02.fm

 

Table 2-3 PU chip allocation

 

 

 

 

 

 

 

 

 

 

 

 

Core

Core

X = CP, IFL, ICF, or zAAP

 

 

 

 

 

 

 

 

 

Single

0

-

X

-

 

 

core

 

 

 

 

 

 

2

-

X

-

 

 

 

 

 

 

 

 

 

 

 

 

 

4

-

X

-

 

 

 

 

 

 

 

 

 

 

6

-

X

-

 

 

 

 

 

 

 

 

 

Dual

8

9

X

Spare

 

 

core

 

 

 

 

 

 

A

B

X

Spare

 

 

 

 

 

 

 

 

 

 

 

 

 

C

D

X

SAP

 

 

 

 

 

 

 

 

 

 

E

F

X

SAP

 

 

 

 

 

 

 

 

￿On a single-book configuration, model A08:

–When a PU failure occurs on a dual-core chip, the two standard spares PUs are used to recover the failing chip, even though only one of the PUs has failed.

–When a failure occurs on a PU on a single-core chip, one standard spare PU is used.

The system does not issue an RSF call in either of the above circumstances.

When a non-characterized PU is used as a spare, in case the system has run out of the standard spares, or when all PUs have been assigned and no non-characterized PU remains available, an RSF call occurs to request a book repair.

￿On a multi-book configuration, models B16, C24, or D32

–In a first step, the standard spare PUs of the MCM where the failing PU resides is assigned as spare, in the same manner as for a one-book system.

–In a second step, when there are not enough spares in the book with the failing PU, non-characterized PUs in other books are used for sparing. When “cross-book” sparing occurs, the book closest to the one with the failing PU will be used.

For example, if a PU failure in Book-1 cannot be solved within locally, spares in Book-2 or Book-0 are then selected. When no spares are available in any adjacent book, Book-3 is approached for a spare PU.

2.2.5Memory design

As for PUs and the I/O subsystem designs, the z990 memory design equally provides great flexibility and high availability, allowing:

￿Concurrent Memory upgrades, except when the physically installed capacity is reached.

The z990 servers may have more physically installed memory than the initial available capacity. Memory upgrades within the physically installed capacity can be done concurrently by the Licensed Internal Code, and no hardware changes are required.

Concurrent memory upgrades can be done via Capacity Upgrade on Demand or Customer Initiated Upgrade. Note that memory upgrades cannot be done via Capacity BackUp (CBU); see Table 8-1 on page 188 for more information.

￿Dynamic Memory sparing

The z990 does not contain spare memory DIMMs. Instead, it has redundant memory distributed throughout its operational memory and this is used to bypass failing memory. Replacing memory cards requires the removal of a book and this is disruptive. The extensive use of redundant elements in the operational memory greatly minimizes the possibility of a failure that requires memory card replacement.

Chapter 2. System structure and design 53

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IBM 990 manual Memory design, Dynamic Memory sparing
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990 specifications

The IBM 990 series, often referred to in the context of IBM's pioneering efforts in the realm of mainframe computing, represents a unique chapter in the history of information technology. Introduced in the late 1960s, the IBM 990 series was designed as a powerful tool for enterprise-level data processing and scientific calculations, showcasing the company's commitment to advancing computing capabilities.

One of the main features of the IBM 990 was its architecture, which was built to support a wide range of applications, from business processing to complex scientific computations. The system employed a 32-bit word length, which was advanced for its time, allowing for more flexible and efficient data handling. CPUs in the IBM 990 series supported multiple instructions per cycle, which contributed significantly to the overall efficiency and processing power of the machines.

The technology behind the IBM 990 was also notable for its use of solid-state technology. This provided a shift away from vacuum tube systems that were prevalent in earlier computing systems, enhancing the reliability and longevity of the hardware. The IBM 990 series utilized core memory, which was faster and more reliable than the magnetic drum memory systems that had been standard up to that point.

Another defining characteristic of the IBM 990 was its extensibility. Organizations could configure the machine to suit their specific needs by adding memory, storage, and peripheral devices as required. This modular approach facilitated the growth of systems alongside the technological and operational demands of the business environments they served.

In terms of software, the IBM 990 series was compatible with a variety of operating systems and programming environments, including FORTRAN and COBOL, enabling users to access a broader array of applications. This versatility was a significant advantage, making the IBM 990 an appealing choice for educational institutions, research facilities, and enterprises alike.

Moreover, the IBM 990 was engineered to support multiprocessing, which allowed multiple processes to run simultaneously, further increasing its effectiveness in tackling complex computing tasks.

In summary, the IBM 990 series represents a significant advancement in computing technology during the late 20th century. With a robust architecture, versatile configuration options, and a focus on solid-state technology, the IBM 990 facilitated substantial improvements in data processing capabilities, making it a cornerstone for many businesses and academic institutions of its time. Its impact can still be seen today in the continued evolution of mainframe computing.
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