Draft Document for Review April 7, 2004 6:15 pm

6947ch08.fm

To exploit this parallel execution capability, the z990 server has implemented an improved instruction scheduling. The instruction execution order is optimized to provide instruction sequences that can operate in a multi-pipeline environment. The major enhancements are in the e-business applications, such as WebSphere and other Java and C/C++ code.

Further exploitation can also be done on the software side. Compilers can be changed to provide an optimized instruction scheduling to better exploit the superscalar design.

8.7.3 Integrated hardware and system assists

To achieve the required throughput and implement new functions while maintaining balanced usage of system resources, integrated hardware and system assists are key.

zSeries Application Assist Processors (zAAPs)

The zSeries Application Assist Processors (zAAPs) are designed to operate asynchronously with the CPs to execute Java programming under control of IBM Java Virtual Machine (JVM) for logical partitions running z/OS. This can help reduce the demands and capacity requirements on CPs which may be available for relocation to other zSeries workloads.

The IBM JVM processing cycles can be executed on the configured zAAPs with no anticipated modifications to the Java applications. Execution of the JVM processing cycles on a zAAP is a function introduced by the Software Developer’s kit (SDK) 1.4.1 for zSeries, z/OS V1.6, and the Processor Resource/Systems Manager (PR/SM).

Cryptographic function on every Processor Unit (PU)

The z990 introduces the Cryptographic Assist Architecture (CAA) along with the CP Assist for Cryptographic Function (CPACF), delivering cryptographic support on every Processor Unit (PU) with DES and TDES data encryption/decryption and SHA-1 hashing.

This offers balanced use of system resources and provides unprecedented scalability (a z990 can have from one to 32 PUs, depending upon model) and data rates at 2X or more faster than the CMOS Cryptographic Coprocessor Facility (CCF).

Since these cryptographic functions are implemented in each and every PU, the association of cryptographic functions to specific PUs, as was done with previous generations of zSeries, is eliminated.

Secure encrypted transactions with higher performance

PCIX Cryptographic Coprocessor (PCIXCC) FC 0868 is a replacement for the PCI Cryptographic Coprocessor (PCICC) and the CMOS Cryptographic Coprocessor Facility that were offered on z900. All of the equivalent PCICC functions that are implemented offer higher performance. In addition, the functions on the CMOS Cryptographic Coprocessor Facility used by known applications have also been implemented in the PCIXCC feature.

The PCIXCC feature supports secure cryptographic functions, use of secure encrypted key values, and User-Defined Extensions.

Continued cryptographic support for the e-business environment

PCI Cryptographic Accelerator (PCICA) FC 0862 is also available on the z990. This hardware-based cryptographic solution continues to address the high Secure Sockets Layer (SSL) performance needs of the on demand environment.

The SSL and Transport Layer Security (TLS) protocols are essential and widely used protocols to support secure e-business applications. Compute-intensive public key

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IBM 990 manual Integrated hardware and system assists, ZSeries Application Assist Processors zAAPs
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990 specifications

The IBM 990 series, often referred to in the context of IBM's pioneering efforts in the realm of mainframe computing, represents a unique chapter in the history of information technology. Introduced in the late 1960s, the IBM 990 series was designed as a powerful tool for enterprise-level data processing and scientific calculations, showcasing the company's commitment to advancing computing capabilities.

One of the main features of the IBM 990 was its architecture, which was built to support a wide range of applications, from business processing to complex scientific computations. The system employed a 32-bit word length, which was advanced for its time, allowing for more flexible and efficient data handling. CPUs in the IBM 990 series supported multiple instructions per cycle, which contributed significantly to the overall efficiency and processing power of the machines.

The technology behind the IBM 990 was also notable for its use of solid-state technology. This provided a shift away from vacuum tube systems that were prevalent in earlier computing systems, enhancing the reliability and longevity of the hardware. The IBM 990 series utilized core memory, which was faster and more reliable than the magnetic drum memory systems that had been standard up to that point.

Another defining characteristic of the IBM 990 was its extensibility. Organizations could configure the machine to suit their specific needs by adding memory, storage, and peripheral devices as required. This modular approach facilitated the growth of systems alongside the technological and operational demands of the business environments they served.

In terms of software, the IBM 990 series was compatible with a variety of operating systems and programming environments, including FORTRAN and COBOL, enabling users to access a broader array of applications. This versatility was a significant advantage, making the IBM 990 an appealing choice for educational institutions, research facilities, and enterprises alike.

Moreover, the IBM 990 was engineered to support multiprocessing, which allowed multiple processes to run simultaneously, further increasing its effectiveness in tackling complex computing tasks.

In summary, the IBM 990 series represents a significant advancement in computing technology during the late 20th century. With a robust architecture, versatile configuration options, and a focus on solid-state technology, the IBM 990 facilitated substantial improvements in data processing capabilities, making it a cornerstone for many businesses and academic institutions of its time. Its impact can still be seen today in the continued evolution of mainframe computing.
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