6947ch02.fm Draft Document for Review April 7, 2004 6:15 pm
40 IBM eServer zSeries 990 Technical Guide
Figure 2-12 Logical book structure
There are up to 12 STI buses per book to transfer data and each STI has a bidirectional
bandwidth of 2.0 GB/sec. A four-book z990 server may have up to 48 STIs.
An STI is an interface from the Memory Bus Adapter (MBA), to:
򐂰An eSTI-M card in an I/O cage, to connect to:
– ESCON channels (16 port cards)
– FICON-Express channels (FICON or FCP modes, two port cards)
– OSA-Express channels (all on two port cards)
• OSA-Express Gb Ethernet
• OSA-Express Fast Ethernet
• OSA-Express 1000BASE-T Ethernet
• OSA-Express High Speed Token Ring
– ISC-3 links (up to four coupling links, two links per daughter card (ISC-D). Two
daughter cards plug into one mother card (ISC-M).
– PCIX Cryptographic Coprocessors (PCIXCC) in an I/O cage. Each PCIX
Cryptographic Coprocessor feature contains one cryptographic coprocessor.
– PCI Cryptographic Accelerator (PCICA) in an I/O cage. Each PCI Cryptographic
Accelerator feature contains two cryptographic accelerator cards.
򐂰An STI-2 card in an I/O cage, connecting to ICB-2 channels in 9672 G5/G6 servers.
򐂰An STI-3 card in an I/O cage, connecting to ICB-3 channels in z800 or z900 servers.
򐂰ICB-4, directly attached to the 2.0 GB/sec STI interface between z990 or z890 servers.
SM1 SM1
PMA0
SM1 SM1
PMA1
SM1
Store Protect Key
Memory Card
SM1 SM1
PMA3PMA1 Memory Card
SM1
Store Protect Key
PMA2
SM1 SM1
PMA2
Cache/chip
8MB
SCD
Cache/chip
8MB
SCD
MSC MSC
MCM
Cache/Chip
8MB
SCD
Cache/Chip
8MB
SCD
SCC
CNTLR
Dual
Cores Dual
Cores Dual
Cores Dual
Cores Dual
Cores Dual
Cores Dual
Cores Dual
Cores
PU PU PU PU PU PU PU PU
Up to 12 STIs
MBA Card
MBAMBAMBA
Ring
Structure
Ring
Structure