6947ch01.fm

Draft Document for Review April 7, 2004 6:15 pm

￿A System Assist Processor (SAP)

￿An Internal Coupling Facility (ICF)

￿An Integrated Facility for Linux (IFL)

￿A zSeries Application Assist Processor (zAAP)

The number of CPs and SAPs assigned for particular general purpose models depends on the configuration. The number of spare PUs is dependent on how many CPs, SAPs, ICFs, zAAPs, and IFLs are present in a configuration.

1.3.2 Memory

The minimum system memory on any model is 16 GB. Memory size can be increased in 8 GB increments to a maximum of to 64 GB per book or 256 GB for the entire CPC. Each book has two memory cards which come in three physical size cards: 8 GB, 16 GB, and 32 GB.

The z990 continues to employ storage size selection by Licensed Internal Code introduced on the G5 processors. Memory cards installed may have more usable memory than required to fulfill the machine order. LICCC will determine how much memory is used from each card.

1.3.3 Self-Timed Interconnect (STI)

An STI is an interface to the Memory Bus Adaptor (MBA), used to gather and send data. 12 STIs per z990 physical book is supported. Each of these STIs has a bidirectional bandwidth of 2 GB/sec. The maximum instantaneous bandwidth per book is 24 GBytes/sec.

1.3.4 Channel Subsystem (CSS)

A new Channel Subsystem (CSS) structure was introduced with z990 to “break the barrier” of 256 channels. With the introduction of the new system structure and all of its scalability benefits, it was essential that the Channel Subsystem also be scalable and allow “horizontal” growth. This is facilitated by multiple Logical Channel Subsystems (LCSSs) on a single zSeries server. The CSS has increased connectivity and is structured to provide the following:

Four Logical Channel Subsystems (LCSS).

Each LCSS may have from one to 256 channels.

Each LCSS can be configured with 1 to 15 logical partitions.

Each LCSS supports 63K I/O devices.

Note: There is no change to the operating system maximums. One operating system image continues to support a maximum of 256 channels, and has a maximum of 63K subchannels available to it.

The I/O subsystem continues to be viewed as a single Input/Output Configuration Data Set (IOCDS) across the entire system with multiple LCSS. Only one Hardware System Area (HSA) is used for the multiple LCSSs.

A three-digit Physical Channel Identifier (PCHID) is being introduced to accommodate the mapping of 1024 channels to four LCSS, with 256 CHPIDs each. CHPIDs continue to exist and will be associated with PCHIDs. An updated CHPID Mapping Tool (CMT) is being introduced and the CHPID report from e-config is replaced by a PCHID report. The CHPID Mapping Tool is available from Resource Link™ as a standalone PC-based program.

6IBM eServer zSeries 990 Technical Guide

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IBM 990 manual Memory, Self-Timed Interconnect STI, Channel Subsystem CSS

990 specifications

The IBM 990 series, often referred to in the context of IBM's pioneering efforts in the realm of mainframe computing, represents a unique chapter in the history of information technology. Introduced in the late 1960s, the IBM 990 series was designed as a powerful tool for enterprise-level data processing and scientific calculations, showcasing the company's commitment to advancing computing capabilities.

One of the main features of the IBM 990 was its architecture, which was built to support a wide range of applications, from business processing to complex scientific computations. The system employed a 32-bit word length, which was advanced for its time, allowing for more flexible and efficient data handling. CPUs in the IBM 990 series supported multiple instructions per cycle, which contributed significantly to the overall efficiency and processing power of the machines.

The technology behind the IBM 990 was also notable for its use of solid-state technology. This provided a shift away from vacuum tube systems that were prevalent in earlier computing systems, enhancing the reliability and longevity of the hardware. The IBM 990 series utilized core memory, which was faster and more reliable than the magnetic drum memory systems that had been standard up to that point.

Another defining characteristic of the IBM 990 was its extensibility. Organizations could configure the machine to suit their specific needs by adding memory, storage, and peripheral devices as required. This modular approach facilitated the growth of systems alongside the technological and operational demands of the business environments they served.

In terms of software, the IBM 990 series was compatible with a variety of operating systems and programming environments, including FORTRAN and COBOL, enabling users to access a broader array of applications. This versatility was a significant advantage, making the IBM 990 an appealing choice for educational institutions, research facilities, and enterprises alike.

Moreover, the IBM 990 was engineered to support multiprocessing, which allowed multiple processes to run simultaneously, further increasing its effectiveness in tackling complex computing tasks.

In summary, the IBM 990 series represents a significant advancement in computing technology during the late 20th century. With a robust architecture, versatile configuration options, and a focus on solid-state technology, the IBM 990 facilitated substantial improvements in data processing capabilities, making it a cornerstone for many businesses and academic institutions of its time. Its impact can still be seen today in the continued evolution of mainframe computing.