6947ch02.fm Draft Document for Review April 7, 2004 6:15 pm
44 IBM eServer zSeries 990 Technical Guide
Processor Branch History Table (BHT)
The Branch History Table (BHT) implementation on processors has a key performance
improvement effect. The BHT was originally introduced on the IBM ES/9000® 9021 in 1990
and has been improved ever since.
The z990 server BHT offers significant branch performance benefits. The BHT allows each
CP to take instruction branches based on a stored BHT, which improves processing t imes for
calculation routines. Using a 100-iteration calculation routine as an example (Figure2-14),
hardware preprocesses branch incorrectly 99 times without a BHT. With a BHT, it
preprocesses branch correctly 98 times.
Figure 2-14 Branch History Table (BHT)
򐂰Without BHT, the processor:
– Makes an incorrect branch guess the first time through the loop (at the second branch
point in Figure 2-14)
– Preprocesses instructions for the guessed branch path
– Starts preprocessing a new path if branch not equal to guess
– Repeats this 98 more times until the last time when the guess matches the actual
branch taken
򐂰With BHT, the processor:
– Makes an incorrect branch guess the first time through the loop (at the second branch
point in Figure 2-14)
– Preprocesses instructions for the guessed branch path
– Starts preprocessing a new path if branch not equal to guess
– Updates the BHT to indicate the last branch action taken at this address
– The next 98 times the branch path comes from the BHT.
– The last time the guess is wrong.
The key point is that, with the BHT, the table is updated to indicate the last branch action
taken at branch addresses. Using the BHT, if a hardware branch at an address matches a
BHT entry, the branch direction is taken from the BHT. Therefore, in the diagram the branches
are correct for the remainder of the loop through the program routine, except for the last one.
The success rate that the BHT design offers contributes a great deal to the superscalar
aspects of the z990, given the fact that the architecture rules prescribe that for successful
parallel execution of an instruction stream, the correctly predicted result of the branch is
essential.

Without BHT:

Hardware branch
guess OK
Hardware branch
guess not OK
99 of 100 times
Guess Path
Actual Path
Hardware branch guess OK
Hardware branch
guess OK
98 of 100 times
Guess Path
Actual Path

With BHT: