Intel MPCBL0001 manual Contents

Intel NetStructure® MPCBL0001 High Performance Single Board Computer

Contents

Contents

1	Introduction					13
	1.1	Document Organization			......................................................................................................	13
	1.2	Glossary				14
2	Features Overview					16
	2.1	Application				16
	2.2	Functional Description				16
		2.2.1	Low Voltage Intel® Xeon™ Processor CPU-0 (U35), CPU-1 (U36)			18
		2.2.2	Chipset			19
			2.2.2.1 Intel® E7501 Memory Controller Hub (U22)			19
			2.2.2.2	Intel®	82801CA I/O Controller Hub 3 (U7)	20
			2.2.2.3	Intel®	82870P2 64-bit PCI/PCI-X Controller Hub 2 (U14, U24)	21
		2.2.3	Memory (J8, J9, J10, J11)			21
			2.2.3.1 Memory Ordering Rule for the MCH			21
		2.2.4	I/O			22
			2.2.4.1	Super I/O (U28)		22
			2.2.4.2	Real-Time Clock		23
			2.2.4.3	Timer0 Capabilities		23
			2.2.4.4	Gigabit Ethernet (U13)		23
			2.2.4.5	Fibre Channel* (U23) - Optional		24
		2.2.5	PMC Connector (J25, J26, J27)			25
		2.2.6	Firmware Hub (U30, U33)			25
			2.2.6.1 FWH 0 (Main BIOS)			26
			2.2.6.2 FWH 1 (Backup/Recovery BIOS)			26
			2.2.6.3 Flash ROM Backup Mechanism			26
		2.2.7	Onboard Power Supplies			27
			2.2.7.1	Power Feed Fuses		27
			2.2.7.2 ORing Diodes and Circuit Breaker Protection			27
			2.2.7.3 -48 V to +12 V Converter			27
			2.2.7.4 -48 V to +5 V/+3.3 V Converter			27
			2.2.7.5 Processor Voltage Regulator Module (VRM)			27
			2.2.7.6	IPMB Standby Power		28
3	Hardware Management Overview					29
	3.1 Sensor Data Record (SDR)					30
	3.2 System Event Log (SEL)					32
		3.2.1	Temperature and Voltage Sensors			36
		3.2.2	Processor Events			41
		3.2.3	DIMM Memory Events			41
		3.2.4	System Firmware Progress (POST Error)			41
		3.2.5	Critical Interrupts			41
		3.2.6	System ACPI Power State			43
		3.2.7	IPMB Link Sensor			43
		3.2.8	FRU Hot Swap			43
		3.2.9	CPU Failure Detection			43
		3.2.10	Port 80h POST Codes			44
	3.3 Field Replaceable Unit (FRU) Information					45

Technical Product Specification	3
Order #273817