Intel MPCBL0001 manual Memory Map, Memory Device Address Size

Intel NetStructure® MPCBL0001 High Performance Single Board Computer

Contents

5.3Memory Map

Table 57.	Memory Map
	Memory Device	Address	Size
	Top of addressable memory	0xFFFF_FFFF	--
	Firmware Hub Devices (x2)	0xFFE0_0000	Up to 16 Mbit
	-- Firmware Hub Device 0	0xFFF0_0000	8 Mbit/1 MB
	-- Firmware Hub Device 1	0xFFE0_0000	8 Mbit/1 MB
		. . .
	HI-B P64H2 IOAPIC B	0xFEC0_4000	256 bytes
	HI-B P64H2 IOAPIC A	0xFEC0_3000	256 bytes
	HI-C P64H2 IOAPIC B	0xFEC0_2000	256 bytes
	HI-C P64H2 IOAPIC A	0xFEC0_1000	256 bytes
	ICH3 IOAPIC	0xFEC0_0000	256 bytes
	Top of main memory …		<system dependent>
	Top of Low Memory		<system dependent>
	TEM-TSEG
	0100_0000	16 MB
	00F0_0000	15 MB
	0010_0000	1 MB
	FWH1 0/1	0xE_0000	128 KB
	(PCI option ROMs, top-down
	allocations)
		0xA_0000
	Main memory	0x0_0000	Up to 4 GB

NOTE: The OS may need to be recompiled to support memory above 4 Gbytes.

The Firmware Hub(s) also appears at the aliased address of (4 Gbyte – 4 Mbyte).

The MCH provides the capability to reclaim the physical memory overlapped by memory-mapped I/O devices, BIOS, and I/O APICs that reside just below 4 Gbytes. This memory may be remapped to physical memory at the address defined by the TOLM register.

Technical Product Specification	97
Order #273817