8050D N/B Maintenance

Features

￿Processor/Host Bus Support

￿Intel® Banias processor

￿2X Address, 4X data

￿Support host bus Dynamic Bus Inversion (DBI) Document

￿Supports system bus at 400MT/s (100 MHz)Secret

￿Supports 64-bit host bus addressing

￿8-deep In-Order-Queue MiTac

￿AGTL+ bus driverConfidentialtechnology w th integr ted GTL termination resistors and low voltage operation (1.05V)

￿Supports Enhanced Intel® Speed Step TM Technology (EIST) and Geyserville III

￿Support for DPWR# signal to Banias processor for PSB power management

￿Memory System

￿Directly supports one DDR channel, 64-bits wide (72-b with ECC).

￿Supports 200-MHz and 266-MHz DDR devices with max of 2 Double-Sided SO-DIMMs(4 rows populated) with unbuffered PC1600/PC2100 DDR(with ECC).

￿Supports 128-Mb, 256-Mb and 512-Mbit technologies providing maximum capacity of 1-GB with only x

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