8170 N/B MAINTENANCE
Optimized for 32-bit applications running on advanced 32-bit operating systems
8-way cache associatively provides improved cache hit rate on load/store operations.
1.2.2.2 CORE LOGIC
Intel Brookdale 82845 Memory Control HUB
Intel® Pentium® 4 Processor (478 pin package) Support:
---Enhanced Mode Scaleable Bus Protocol
---2x Address, 4x Data
---System Bus interrupt delivery
---400 MHz system bus
---System Bus Dynamic Bus Inversion (DBI)
---32-bit system bus addressing
---12 deep In-Order Queue
---AGTL+ bus driver technology with integrated AGTL+ termination resistors System Memory Support
---Directly supports one SDR SDRAM channel, 64 bits wide (72 bits with ECC) | |
---133 MHz SDR SDRAM devices | |
---64 Mb, 128 Mb, 256 Mb and 512 Mb technologies for x8 and x16 devices | |
---By using 64 Mb technology, the smallest memory capacity possible is 32 MB | |
---Configurable optional ECC operation (single bit Error Correction and multiple bit Error Detection) | |
---Page sizes of 2 KB, 4 KB, 8 KB and 16 KB (individually selected for every row) | |
---Thermal management | |
---Maximum of 3 Double-Sided DIMMs (6rows populated) with unbuffered PC133 (with or without ECC) | |
---3 GB Maximum using 512 Mb technology | |
---Supports up to 24 simultaneous open pages | |
---Maximum memory bandwidth of 1.067 GB/s with PC133 | 8 |
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