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Motorola
MVME197LE
user manual
List of Figures
Models:
MVME197LE
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11
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Specifications
Install
Programmable Tick Timers
Controls and Indicators
Configuration Switches
Local Reset Operation
VMEbus Connector P1
Processor Bus Timeout
Battery Backup RAM and Clock
Features
Page 11
Image 11
List of Figures
Figure
2-1.
MVME197LE Switches, Connectors, and LED Indicators
Location Diagram
2-2
Figure
4-1.
MVME197LE Block Diagram
4-2
Figure
A-1.
Middle-of-the-Road
EIA-232-D
Configuration
A-5
Figure
A-2.
Minimum
EIA-232-D
Connection
A-6
xi
Page 10
Page 12
Page 11
Image 11
Page 10
Page 12
Contents
MVME197LE/D2
MVME197LE
Restricted Rights Legend
Document Terminology
Preface
BIT
Document Title Motorola Publication Number
Related Documentation
Page
Page
Safety Summary Safety Depends on YOU
Contents
Appendix a
List of Figures
Xii
List of Tables
Xiv
General Description
Introduction
Ote
Features
Characteristics Specifications
Specifications
MVME197LE Specifications
Cooling Requirements
FCC Compliance
Equipment Required
Support Information
Hardware Preparation
Unpacking Instructions
Hardware Preparation and Installation
VMEbus Connector P1
Configuration Switch S1 General Information
Configuration Switches
Switch S1
S1-1 to S1-8 OFF -- All Ones Factory Configuration
Connectors
Installation Instructions
Switch S6
MVME197LE Module Installation
System Considerations
MVME197LE/D2
Hardware Preparation and Installation
Reset Switch S3
Controls and Indicators
Abort Switch S2
Processor Bus Memory Map
Front Panel Indicators DS1-DS6
Memory Maps
Processor Bus Memory Map
Local Devices Memory Map
Address Range Devices Accessed Port Size
Detailed I/O Memory Maps
110
BusSwitch Register Memory Map
100
108
Memory Maps
ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER
Ecdm CSR Register Memory Map
Dcam I2C Register Memory Map
Dcam I2C Base Address = $C0 default Offset
Operating Instructions
Offset
VMEchip2 Memory Map Sheet 1
Operating Instructions
VMEchip2 Memory Map Sheet 2
Global Access BUS Watchdog Timeout Prescaler Adjust
Operating Instructions
VMEchip2 Memory Map Sheet 3
Operating Instructions
VMEchip2 Gcsr Base Address = $FFF40100
VMEchip2 Memory Map Sheet 4
Operating Instructions
PCCchip2 Memory Map
Printer Busy Interrupt Control Register $FFF42034
Printer Fault Interrupt Control Register $FFF42031
Printer SEL Interrupt Control Register $FFF42032
Printer PE Interrupt Control Register $FFF42033
Base Address Is $FFF45000
Cirrus Logic CD2400 Memory Map Offsets Size Access
Cirrus Logic CD2401 Serial Port Memory Map
Data Bits Address D31 D16 D15
Address Range Description Size Bytes
Accesses may be 8-bit or 32-bit, but not 16-bit
11 C710 Scsi Memory Map
12. MK48T08 BBRAM, TOD Clock Memory Map
Data Bits Address Function
13. Bbram Configuration Area Memory Map
14. TOD Clock Memory Map
000000470476
BBRAM, TOD Clock Memory Map
0460
5000
VMEbus Accesses to the Local Peripheral Bus
VMEbus Memory Map
01-W3869B03A
Multi-MPU Programming Considerations
Local Reset Operation
Software Initialization
User’s Manual
MC88110 MPU
MVME197LE Functional Description
Data Bus Structure
Functional Description
Memory Array
Bus Data Bus 256 BusSwitch
MC88110 Address Data MUX Address
Mezzanine Address Bus
Onboard Dram
Battery Backup RAM and Clock
Flash Memory
Serial Port Interface
VMEbus Interface
Interfaces
Ethernet Interface
Printer Interface
Scsi Termination
Programmable Tick Timers
Peripheral Resources
Scsi Interface
Interrupt Sources
Watchdog Timer
Processor Bus Timeout
Local Peripheral Bus Timeout
MVME197LE/D2
Functional Description
EIA-232-D Interconnections
Table A-1. EIA-232-D Interconnections
Pin Signal Signal Name and Description Number Mnemonic
Ring Indicator RI is sent by the modem to
User’s Manual
Figure A-1. Middle-of-the-Road EIA-232-D Configuration
Figure A-2. Minimum EIA-232-D Connection
Numerics
Index
IN-2
IN-3
Index
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Contents