Memory Maps
Table 3-9. Cirrus Logic CD2401 Serial Port Memory Map
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| Base Address Is $FFF45000 | ||
Cirrus Logic CD2400 Memory Map |
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| Offsets | Size | Access |
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Global Firmware Revision Code Register | (GFRCR) | 81 | B | R | |
Transmit FIFO Transfer Count | (TFTC) | 80 | B | R | |
Modem End Of Interrupt Register | (MEOIR) | 86 | B | R/W | |
Transmit End Of Interrupt Register | (TEOIR) | 85 | B | R/W | |
Receive End Of Interrupt Register | (REOIR) | 84 | B | R/W | |
Modem (/Timer) Interrupt Status Register | (MISR) | 8B | B | R | |
Transmit Interrupt Status Register | (TISR) | 8A | B | R | |
Receive Interrupt Status Register | (RISR) | 88 | W | R | |
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| (NOTE) |
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Receive Interrupt Status Register low | (RISRl) | 89 | B | R | |
Receive Interrupt Status Register high | (RISRh) | 88 | B | R | |
Timer Period Register | (TPR) | DA | B | R/W | |
Priority Interrupt level Register 1 | (PILR1) | E3 | B | R/W | |
Priority Interrupt level Register 2 | (PILR2) | E0 | B | R/W | |
Priority Interrupt level Register 3 | (PILR3) | E1 | B | R/W | |
Channel Access Register | (CAR) | EE | B | R/W | |
Receive Data Register | (RDR) | F8 | B | R | |
Transmit Data Register | (TDR) | F8 | B | W | |
Local Interrupting Channel Register | (LICR) | 26 | B | R/W | |
Local Interrupt Vector Register | (LIVR) | 09 | B | R/W | |
Channel Command Register | (CRR) | 13 | B | R/W | |
Special Transmit Command Register | (STCR) | 12 | B | R/W | |
Interrupt Enable Register | (IER) | 11 | B | R/W | |
Channel Option Register 1 | (COR1) | 10 | B | R/W | |
Channel Option Register 2 | (COR2) | 17 | B | R/W | |
Channel Option Register 3 | (COR3) | 16 | B | R/W | |
Channel Option Register 4 | (COR4) | 15 | B | R/W | |
Channel Option Register 5 | (COR5) | 14 | B | R/W | |
Channel Mode Register | (CMR) | 1B | B | R/W | |
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This is a
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MVME197LE/D2 |
