VMEbus Connector P1 | Motorola MVME197LE specs

MVME197LE/D2

					VMEbus CONNECTOR P1

					P1

					A32
				A1
				A1
				B1	B32
				C1	C32

S1

O		1	2	3	4	5	6	7	8	9
N

CONFIGURATION SWITCH S1

GENERAL PURPOSE/SCON

MODULE CONNECTOR J1

REMOTE RESET/ABORT/LEDS

VMEbus CONNECTOR P2

P2

A1

A32

B1

B32

C1

C32

1A17

1A1

2A17

3A1

3A17

1A1

1E1

1E17

1E1

2E17

3E1

3E17

MEZZANINE CONNECTOR J2

O 1

2

S6

N

CONFIGURATION SWITCH S6

SERIAL PORT 4 CLOCK SELECT

202

J1

191

ABORT RESET SWITCH SWITCH

S2 S3

2-3

DS1	DS2	DS3	DS4	DS5	DS6	S2	S3

FAIL

SCON

RUN

LAN

VME

SCSI

MVME197LE

Figure 2-1. MVME197LE Switches, Connectors, and LED Indicators Location Diagram

Hardware Preparation

2

Image 23

Motorola MVME197LE user manual VMEbus Connector P1

Contents

MVME197LE/D2 MVME197LE Restricted Rights Legend Document Terminology Preface BIT Document Title Motorola Publication Number Related DocumentationPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv General Description Introduction Ote Features Characteristics Specifications SpecificationsMVME197LE Specifications Cooling Requirements FCC Compliance Equipment Required Support Information Hardware Preparation Unpacking Instructions Hardware Preparation and Installation VMEbus Connector P1 Configuration Switch S1 General Information Configuration SwitchesSwitch S1 S1-1 to S1-8 OFF -- All Ones Factory Configuration Connectors Installation InstructionsSwitch S6 MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Reset Switch S3 Controls and IndicatorsAbort Switch S2 Processor Bus Memory Map Front Panel Indicators DS1-DS6Memory Maps Processor Bus Memory Map Local Devices Memory Map Address Range Devices Accessed Port Size Detailed I/O Memory Maps 110 BusSwitch Register Memory Map100 108 Memory Maps ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Ecdm CSR Register Memory Map Dcam I2C Register Memory Map Dcam I2C Base Address = $C0 default Offset Operating Instructions Offset VMEchip2 Memory Map Sheet 1 Operating Instructions VMEchip2 Memory Map Sheet 2 Global Access BUS Watchdog Timeout Prescaler Adjust Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Gcsr Base Address = $FFF40100 VMEchip2 Memory Map Sheet 4 Operating Instructions PCCchip2 Memory Map Printer Busy Interrupt Control Register $FFF42034 Printer Fault Interrupt Control Register $FFF42031Printer SEL Interrupt Control Register $FFF42032 Printer PE Interrupt Control Register $FFF42033 Base Address Is $FFF45000 Cirrus Logic CD2400 Memory Map Offsets Size AccessCirrus Logic CD2401 Serial Port Memory Map Data Bits Address D31 D16 D15 Address Range Description Size Bytes Accesses may be 8-bit or 32-bit, but not 16-bit11 C710 Scsi Memory Map 12. MK48T08 BBRAM, TOD Clock Memory Map Data Bits Address Function 13. Bbram Configuration Area Memory Map14. TOD Clock Memory Map 000000470476 BBRAM, TOD Clock Memory Map0460 5000 VMEbus Accesses to the Local Peripheral BusVMEbus Memory Map 01-W3869B03A Multi-MPU Programming Considerations Local Reset OperationSoftware Initialization User’s Manual MC88110 MPU MVME197LE Functional DescriptionData Bus Structure Functional Description Memory Array Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Mezzanine Address Bus Onboard Dram Battery Backup RAM and ClockFlash Memory Serial Port Interface VMEbus InterfaceInterfaces Ethernet Interface Printer Interface Scsi Termination Programmable Tick TimersPeripheral Resources Scsi Interface Interrupt Sources Watchdog TimerProcessor Bus Timeout Local Peripheral Bus Timeout MVME197LE/D2 Functional Description EIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Ring Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Numerics Index IN-2 IN-3 Index