Index, Numerics | Motorola MVME197LE manual

Index

When using this index, keep in mind that a page number indicates only where referenced material begins. It may extend to the page or pages following the page referenced.

Numerics	DCAM (I2C) Register Memory Map 3-8
197Bug 2-3	DCAM ASIC 1-2
53C710 SCSI Memory Map 3-17	Detailed I/O Memory Maps 3-5
82596CA Ethernet LAN Memory Map	diagram(s)
3-16	MVME197LE Block 4-2
A	MVME197LE Switches, Connectors,
A	and LED Indicators Location
ABORT Switch S2 3-1	2-2
address, ethernet station 4-5	DROM (Download ROM) 4-3

B

Battery Backup RAM and Clock 4-3 BBRAM Configuration Area Memory

Map 3-18

BBRAM, TOD Clock Memory Map 3-19 BOOT ROM 2-5, 4-3

bus terminators, SCSI 4-6 BusSwitch ASIC 1-1

BusSwitch Register Memory Map 3-6

C

Cirrus Logic CD2401 Serial Port Memory Map 3-15

Configuration Switch S1 2-3, 2-4 Configuration Switch S6 2-5 Connector P2 2-7 Connectors 1-4, 2-5 connectors, P1 and P2 2-5 Controls and Indicators 3-1 Cooling Requirements 1-4

D

Data Bus Structure 4-1

E

ECDM ASIC 1-2

ECDM CSR Register Memory Map 3-7

Equipment Required 1-5

Ethernet Interface 4-5

Ethernet Station Address 4-5

F

FCC-compliant chassis 1-5 Features, MVME197LE 1-2 FFC Compliance 1-5 FLASH Memory 4-3 forced air cooling 1-4

Front Panel Indicators (DS1-DS6) 3-2 fuse (F2) 2-8

G

General Description, MVME197LE

module 1-1

General Information, Switch 2-3

H

hardware interrupt, VMEchip2 4-7

MVME197LE/D2IN-1

Image 75

Motorola MVME197LE user manual Index, Numerics

Contents

MVME197LE/D2 MVME197LE Restricted Rights Legend Document Terminology Preface BIT Document Title Motorola Publication Number Related DocumentationPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv General Description Introduction Ote Features Specifications MVME197LE SpecificationsCharacteristics Specifications Cooling Requirements FCC Compliance Equipment Required Support Information Hardware Preparation Unpacking Instructions Hardware Preparation and Installation VMEbus Connector P1 Configuration Switches Switch S1Configuration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Installation Instructions Switch S6Connectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Controls and Indicators Abort Switch S2Reset Switch S3 Front Panel Indicators DS1-DS6 Memory MapsProcessor Bus Memory Map Processor Bus Memory Map Local Devices Memory Map Address Range Devices Accessed Port Size Detailed I/O Memory Maps 110 BusSwitch Register Memory Map100 108 Memory Maps ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Ecdm CSR Register Memory Map Dcam I2C Register Memory Map Dcam I2C Base Address = $C0 default Offset Operating Instructions Offset VMEchip2 Memory Map Sheet 1 Operating Instructions VMEchip2 Memory Map Sheet 2 Global Access BUS Watchdog Timeout Prescaler Adjust Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Gcsr Base Address = $FFF40100 VMEchip2 Memory Map Sheet 4 Operating Instructions PCCchip2 Memory Map Printer Busy Interrupt Control Register $FFF42034 Printer Fault Interrupt Control Register $FFF42031Printer SEL Interrupt Control Register $FFF42032 Printer PE Interrupt Control Register $FFF42033 Cirrus Logic CD2400 Memory Map Offsets Size Access Cirrus Logic CD2401 Serial Port Memory MapBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Address Range Description Size Bytes Accesses may be 8-bit or 32-bit, but not 16-bit11 C710 Scsi Memory Map 12. MK48T08 BBRAM, TOD Clock Memory Map 13. Bbram Configuration Area Memory Map 14. TOD Clock Memory MapData Bits Address Function BBRAM, TOD Clock Memory Map 0460000000470476 5000 VMEbus Accesses to the Local Peripheral BusVMEbus Memory Map 01-W3869B03A Local Reset Operation Software InitializationMulti-MPU Programming Considerations User’s Manual MVME197LE Functional Description Data Bus StructureMC88110 MPU Functional Description Memory Array Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Mezzanine Address Bus Battery Backup RAM and Clock Flash MemoryOnboard Dram VMEbus Interface InterfacesSerial Port Interface Ethernet Interface Printer Interface Scsi Termination Programmable Tick TimersPeripheral Resources Scsi Interface Interrupt Sources Watchdog TimerProcessor Bus Timeout Local Peripheral Bus Timeout MVME197LE/D2 Functional Description EIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Ring Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Numerics Index IN-2 IN-3 Index