VMEchip2 Memory Map Sheet 2 | Motorola MVME197LE specs

MVME197LE/D2

3-13

Table 3-6. VMEchip2 Memory Map (Continued)

(Sheet 2 of 4)

VMEchip2 LCSR Base Address = $FFF40000

OFFSET:

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

30

ROM0

DMAC TB

SPRAM

LV

LV

LV

LV

LV

LV

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

(XX)

SNP MODE

SPEED

ROBN

DHB

DWB

FAIR

RWD

REQUEST

HALT

EN

TBL

FAIR

RELM

REQUEST

(XX)

(XX)

MODE

LEVEL

LEVEL

34

DMAC

DMAC LB

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

INTE

SNP

VME

LB

TVME

D16

BLK

BLK

AM

AM

AM

AM

AM

AM

MODE

INC

INC

TR

TR

38

DMAC LOCAL BUS ADDRESS COUNTER

3C

DMAC VMEbus ADDRESS COUNTER

40

DMAC BYTE COUNTER

44

DMAC TABLE ADDRESS COUNTER

48

INTERRUPT

IRQ

IRQ

VMEbus

DMAC

MPU

MPU

MPU

MPU

MPU

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

DMAC

1

CLR

STAT

INTERRUPT

VMEbus INTERRUPT VECTOR

INTERRUPT

CLR

LB

LB

LB

LB

LB

LB

LB

LB

LB

VME

DONE

SIGNAL

LEVEL

COUNTER

EN

PERR

OB

TO

EN

PERR

OB

TO

ERR

ERR

4C

VB

DMAC

DMAC

VMEbus

VMEbus

LOCAL

TO

TIME OFF

TIME ON

GLOBAL

ACCESS

BUS

WATCHDOG TIMEOUT

PRESCALER ADJUST

TIMEOUT

TIMEOUT

TIMEOUT

50

TICK TIMER 1 COMPARE

54

TICK TIMER 1 COUNTER

58

TICK TIMER 2 COMPARE

5C

TICK TIMER 2 COUNTER

60

SCON

SYS

BRD

PURS

CLR

BRD

RST

SYS

WD

WD

WD

WD

WD

WD

WD

OVERFLOW

CLR

COC

CNT

OVERFLOW

CLR

COC

CNT

FAIL

FAIL

STAT

PURS

FAIL

SW

RST

CLR

CLR

TO

BDF

SYS

RST

EN

COUNTER 2

OVF

2

EN

COUNTER 1

OVF

1

EN

STAT

STAT

OUT

EN

STAT

CNT

STAT

EN

LRST

EN

2

2

1

1

64

PRESCALER COUNTER

D31

D30

D29

D28

D27

D26

D25

D24

D23

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

LB

= Local Bus

VB

= VMEbus

(LB)

= Local Bus Slave

(VB)

= VMEbus Slave

LV

= Local Bus to VMEbus

(XX)

= Not Used on the MVME197 Series

Memory Maps

3

Image 43

Motorola MVME197LE user manual VMEchip2 Memory Map Sheet 2, Global Access BUS Watchdog Timeout Prescaler Adjust

Contents

MVME197LE/D2 MVME197LE Restricted Rights Legend Document Terminology Preface BIT Document Title Motorola Publication Number Related DocumentationPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv General Description Introduction Ote Features MVME197LE Specifications SpecificationsCharacteristics Specifications Cooling Requirements FCC Compliance Equipment Required Support Information Hardware Preparation Unpacking Instructions Hardware Preparation and Installation VMEbus Connector P1 Switch S1 Configuration SwitchesConfiguration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Switch S6 Installation InstructionsConnectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Abort Switch S2 Controls and IndicatorsReset Switch S3 Memory Maps Front Panel Indicators DS1-DS6Processor Bus Memory Map Processor Bus Memory Map Local Devices Memory Map Address Range Devices Accessed Port Size Detailed I/O Memory Maps 110 BusSwitch Register Memory Map100 108 Memory Maps ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Ecdm CSR Register Memory Map Dcam I2C Register Memory Map Dcam I2C Base Address = $C0 default Offset Operating Instructions Offset VMEchip2 Memory Map Sheet 1 Operating Instructions VMEchip2 Memory Map Sheet 2 Global Access BUS Watchdog Timeout Prescaler Adjust Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Gcsr Base Address = $FFF40100 VMEchip2 Memory Map Sheet 4 Operating Instructions PCCchip2 Memory Map Printer Busy Interrupt Control Register $FFF42034 Printer Fault Interrupt Control Register $FFF42031Printer SEL Interrupt Control Register $FFF42032 Printer PE Interrupt Control Register $FFF42033 Cirrus Logic CD2401 Serial Port Memory Map Cirrus Logic CD2400 Memory Map Offsets Size AccessBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Address Range Description Size Bytes Accesses may be 8-bit or 32-bit, but not 16-bit11 C710 Scsi Memory Map 12. MK48T08 BBRAM, TOD Clock Memory Map 14. TOD Clock Memory Map 13. Bbram Configuration Area Memory MapData Bits Address Function 0460 BBRAM, TOD Clock Memory Map000000470476 5000 VMEbus Accesses to the Local Peripheral BusVMEbus Memory Map 01-W3869B03A Software Initialization Local Reset OperationMulti-MPU Programming Considerations User’s Manual Data Bus Structure MVME197LE Functional DescriptionMC88110 MPU Functional Description Memory Array Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Mezzanine Address Bus Flash Memory Battery Backup RAM and ClockOnboard Dram Interfaces VMEbus InterfaceSerial Port Interface Ethernet Interface Printer Interface Scsi Termination Programmable Tick TimersPeripheral Resources Scsi Interface Interrupt Sources Watchdog TimerProcessor Bus Timeout Local Peripheral Bus Timeout MVME197LE/D2 Functional Description EIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Ring Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Numerics Index IN-2 IN-3 Index