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Motorola MVME197LE user manual

Models: MVME197LE

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User’s Manual

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Table 3-4. ECDM CSR Register Memory Map

Sub-System Memory CSR Base Address = $FFF01000

Offset/Register:

ECDM0

ECDM1

ECDM2

ECDM3

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

ADDR/REGISTER

00 / MEMCON0

01 / ECDMID0

02 / MEMCON1

03 / ECDMID1

04 / MEMCON2

05 / ECDMID2

06 / MEMCON3

07 / ECDMID3

08 / SYNSTAT0

09 / ERSTAT0

0A / SYNSTAT1

0B / ERSTAT1

0C / SYNSTAT2

0D / ERSTAT2

0E / SYNSTAT3

0F / ERSTAT3

10 / I2CON0

11 / I2STAT0

12 / I2CON1

13 / I2STAT1

14

/ I2CON2

15 / I2STAT2

16 / I2CON3

17 / I2STAT3

18 / I2DATA0

19 / I2ADDR0

1A / I2DATA1

1B / I2ADDR1

1C / I2DATA2

1D / I2ADDR2

1E / I2DATA3

1F / I2ADDR3

D64

D56

D55

D48

D47

D40

D39

D32

D31

D24

D23

D16

D15

D8

D7

D0

ECDM register map of four ECDM devices in a 64-bit system. The byte offset address is shown next to each register.

Operating Instructions

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Motorola MVME197LE user manual

Contents

MVME197LE MVME197LE/D2Restricted Rights Legend Preface Document TerminologyBIT Related Documentation Document Title Motorola Publication NumberPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv Introduction General DescriptionFeatures OteCharacteristics Specifications SpecificationsMVME197LE Specifications Cooling Requirements Equipment Required FCC ComplianceSupport Information Unpacking Instructions Hardware PreparationHardware Preparation and Installation VMEbus Connector P1 Configuration Switch S1 General Information Configuration SwitchesSwitch S1 S1-1 to S1-8 OFF -- All Ones Factory Configuration Connectors Installation InstructionsSwitch S6 MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Reset Switch S3 Controls and IndicatorsAbort Switch S2 Processor Bus Memory Map Front Panel Indicators DS1-DS6Memory Maps Processor Bus Memory Map Address Range Devices Accessed Port Size Local Devices Memory MapDetailed I/O Memory Maps 108 BusSwitch Register Memory Map100 110Memory Maps Ecdm CSR Register Memory Map ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTERDcam I2C Base Address = $C0 default Offset Dcam I2C Register Memory MapOperating Instructions VMEchip2 Memory Map Sheet 1 OffsetOperating Instructions Global Access BUS Watchdog Timeout Prescaler Adjust VMEchip2 Memory Map Sheet 2Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Memory Map Sheet 4 VMEchip2 Gcsr Base Address = $FFF40100Operating Instructions PCCchip2 Memory Map Printer PE Interrupt Control Register $FFF42033 Printer Fault Interrupt Control Register $FFF42031Printer SEL Interrupt Control Register $FFF42032 Printer Busy Interrupt Control Register $FFF42034Base Address Is $FFF45000 Cirrus Logic CD2400 Memory Map Offsets Size AccessCirrus Logic CD2401 Serial Port Memory Map Data Bits Address D31 D16 D15 12. MK48T08 BBRAM, TOD Clock Memory Map Accesses may be 8-bit or 32-bit, but not 16-bit11 C710 Scsi Memory Map Address Range Description Size BytesData Bits Address Function 13. Bbram Configuration Area Memory Map14. TOD Clock Memory Map 000000470476 BBRAM, TOD Clock Memory Map0460 01-W3869B03A VMEbus Accesses to the Local Peripheral BusVMEbus Memory Map 5000Multi-MPU Programming Considerations Local Reset OperationSoftware Initialization User’s Manual MC88110 MPU MVME197LE Functional DescriptionData Bus Structure Functional Description Mezzanine Address Bus Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Memory ArrayOnboard Dram Battery Backup RAM and ClockFlash Memory Serial Port Interface VMEbus InterfaceInterfaces Printer Interface Ethernet InterfaceScsi Interface Programmable Tick TimersPeripheral Resources Scsi TerminationLocal Peripheral Bus Timeout Watchdog TimerProcessor Bus Timeout Interrupt SourcesMVME197LE/D2 Functional Description EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Table A-1. EIA-232-D InterconnectionsRing Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Index NumericsIN-2 IN-3 Index