![](/images/new-backgrounds/1267916/26791675x1.webp)
User’s Manual
3
Table 3-4. ECDM CSR Register Memory Map
Offset/Register:
| ECDM0 |
|
| ECDM1 |
|
| ECDM2 |
|
| ECDM3 |
| ||||
|
|
|
|
|
|
|
| ||||||||
ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ADDR/REGISTER | ||||||||
|
|
|
|
|
|
|
| ||||||||
00 / MEMCON0 | 01 / ECDMID0 | 02 / MEMCON1 | 03 / ECDMID1 | 04 / MEMCON2 | 05 / ECDMID2 | 06 / MEMCON3 | 07 / ECDMID3 | ||||||||
|
|
|
|
|
|
|
| ||||||||
08 / SYNSTAT0 | 09 / ERSTAT0 | 0A / SYNSTAT1 | 0B / ERSTAT1 | 0C / SYNSTAT2 | 0D / ERSTAT2 | 0E / SYNSTAT3 | 0F / ERSTAT3 | ||||||||
|
|
|
|
|
|
|
|
| |||||||
10 / I2CON0 | 11 / I2STAT0 | 12 / I2CON1 | 13 / I2STAT1 | 14 | / I2CON2 | 15 / I2STAT2 | 16 / I2CON3 | 17 / I2STAT3 | |||||||
|
|
|
|
|
|
|
| ||||||||
18 / I2DATA0 | 19 / I2ADDR0 | 1A / I2DATA1 | 1B / I2ADDR1 | 1C / I2DATA2 | 1D / I2ADDR2 | 1E / I2DATA3 | 1F / I2ADDR3 | ||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
D64 | D56 | D55 | D48 | D47 | D40 | D39 | D32 | D31 | D24 | D23 | D16 | D15 | D8 | D7 | D0 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ECDM register map of four ECDM devices in a
Operating Instructions