IN-2 | Motorola MVME197LE instruction

Index

I

I/O Interfaces 4-4 Installation Instructions 2-5 installation, MVME197LE 2-6 interfaces

ethernet 4-5 I/O 4-4 printer 4-5 SCSI 4-6 serial port 4-4 VMEbus 4-4

introduction(s)

Functional Description 4-1 General Information 1-1 Hardware Preparation and

Installation 2-1 Operating Instructions 3-1

L

LEDs, front panel 3-2

Local Devices Memory Map 3-4 local peripheral bus (MC68040

compatible bus) 1-1 Local Peripheral Bus Timeout 4-7

PCCchip2 3-13 printer 3-14 Processor Bus 3-3 SCSI 3-17 VMEchip2 3-9

mezzanine connector 2-5 MK48T08 BBRAM Memory 3-19 MK48T08 BBRAM, TOD Clock Memory

Map 3-17

module expansion 2-5

MVME197BUG 197Bug Debugging Package User’s Manual 1-6, 3-20 MVME197Bug debug monitor firmware

(197Bug) 1-5 MVME197LE Block Diagram 4-2 MVME197LE Functional Description 4-1 MVME197LE Module Installation 2-6 MVME197LE registers 2-1 MVME197LE Specifications 1-3 MVME712M Transition Module and P2

Adapter Board User’s Manual 2-5

MVME712X 1-1

MVME712-XX 1-1

I

N D E X

	M	N
	mapping	Non-Volatile RAM Memory (NVRAM)
	Local Peripheral Bus (MC68040	3-19
	compatible bus) 3-2	O
	Processor Bus (MC88110 bus) 3-2
	VMEbus Masters 3-2	Onboard DRAM 4-3
	MC88110 MPU 4-1	Operating temperature 1-3
	MC88110 RISC microprocessor 1-1, 4-1	P
	memory map(s)
		P1 and P2 connectors 2-6
	BBRAM Configuration Area 3-18
		PCCchip2 ASIC 1-2
	BBRAM/TOC Clock 3-17
		PCCchip2 Memory Map 3-13
	BusSwitch Register 3-6
		Peripheral Resources 4-6
	CD2401 Serial Port 3-15
		Physical dimensions, board 1-4
	DCAM (I2C) 3-8
		Power requirements 1-3
	ECDM CSR Register 3-7
		Printer Interface 4-5
	Ethernet LAN 3-16
		Printer Memory Map 3-14
	Local Devices 3-4

IN-2	User’s Manual

Image 76

Motorola MVME197LE user manual IN-2

Contents

MVME197LE MVME197LE/D2 Restricted Rights Legend Preface Document Terminology BIT Related Documentation Document Title Motorola Publication NumberPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv Introduction General Description Features Ote MVME197LE Specifications SpecificationsCharacteristics Specifications Cooling Requirements Equipment Required FCC Compliance Support Information Unpacking Instructions Hardware Preparation Hardware Preparation and Installation VMEbus Connector P1 Switch S1 Configuration SwitchesConfiguration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Switch S6 Installation InstructionsConnectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Abort Switch S2 Controls and IndicatorsReset Switch S3 Memory Maps Front Panel Indicators DS1-DS6Processor Bus Memory Map Processor Bus Memory Map Address Range Devices Accessed Port Size Local Devices Memory Map Detailed I/O Memory Maps BusSwitch Register Memory Map 100108 110 Memory Maps Ecdm CSR Register Memory Map ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Dcam I2C Base Address = $C0 default Offset Dcam I2C Register Memory Map Operating Instructions VMEchip2 Memory Map Sheet 1 Offset Operating Instructions Global Access BUS Watchdog Timeout Prescaler Adjust VMEchip2 Memory Map Sheet 2 Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Memory Map Sheet 4 VMEchip2 Gcsr Base Address = $FFF40100 Operating Instructions PCCchip2 Memory Map Printer Fault Interrupt Control Register $FFF42031 Printer SEL Interrupt Control Register $FFF42032Printer PE Interrupt Control Register $FFF42033 Printer Busy Interrupt Control Register $FFF42034 Cirrus Logic CD2401 Serial Port Memory Map Cirrus Logic CD2400 Memory Map Offsets Size AccessBase Address Is $FFF45000 Data Bits Address D31 D16 D15 Accesses may be 8-bit or 32-bit, but not 16-bit 11 C710 Scsi Memory Map12. MK48T08 BBRAM, TOD Clock Memory Map Address Range Description Size Bytes 14. TOD Clock Memory Map 13. Bbram Configuration Area Memory MapData Bits Address Function 0460 BBRAM, TOD Clock Memory Map000000470476 VMEbus Accesses to the Local Peripheral Bus VMEbus Memory Map01-W3869B03A 5000 Software Initialization Local Reset OperationMulti-MPU Programming Considerations User’s Manual Data Bus Structure MVME197LE Functional DescriptionMC88110 MPU Functional Description Bus Data Bus 256 BusSwitch MC88110 Address Data MUX AddressMezzanine Address Bus Memory Array Flash Memory Battery Backup RAM and ClockOnboard Dram Interfaces VMEbus InterfaceSerial Port Interface Printer Interface Ethernet Interface Programmable Tick Timers Peripheral ResourcesScsi Interface Scsi Termination Watchdog Timer Processor Bus TimeoutLocal Peripheral Bus Timeout Interrupt Sources MVME197LE/D2 Functional Description EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Table A-1. EIA-232-D Interconnections Ring Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Index Numerics IN-2 IN-3 Index