MC88110 Address Data MUX Address, Memory Array | Motorola MVME197LE

MVME197LE/D2

4-3

			MC88110
	Address	32	Data	64	MUX Address
	Address	32	Data	64	DCAM	RAS, CAS
					DCAM
Mezzanine	Address Bus	PROCESSOR					Memory Array
Mezzanine
Port
Port			BUS			Data	32/64 MB
			BUS			Data
					ECDM	Bus
					ECDM
	Data Bus				(X4)	256
		BusSwitch				I2C EEPROM
					I2CBus	I2C EEPROM
					I2CBus
	Address	32	Data	32
Address Bus					LOCAL PERIPHERAL
	Data Bus					BUS
	Data Bus
							NVRAM/RTC
	LAN		Flash		PCCchip2		BOOT
	82596CA		Memory		PCCchip2		ROM

VMEbus

SCSI -II

4 Serial Ports

(VMEchip2)

NCR53710

CL-CD2401

Figure 4-1. MVME197LE Block Diagram

MVME197LE Functional Description

4

Image 61

Motorola MVME197LE MC88110 Address Data MUX Address, Mezzanine Address Bus, Memory Array, Port, Data 32/64 MB, 2CBus

Contents

MVME197LE/D2 MVME197LE Restricted Rights Legend Document Terminology Preface BIT Document Title Motorola Publication Number Related DocumentationPage Page Safety Summary Safety Depends on YOU Contents Appendix a List of Figures Xii List of Tables Xiv General Description Introduction Ote Features MVME197LE Specifications SpecificationsCharacteristics Specifications Cooling Requirements FCC Compliance Equipment Required Support Information Hardware Preparation Unpacking Instructions Hardware Preparation and Installation VMEbus Connector P1 Switch S1 Configuration SwitchesConfiguration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Switch S6 Installation InstructionsConnectors MVME197LE Module Installation System Considerations MVME197LE/D2 Hardware Preparation and Installation Abort Switch S2 Controls and IndicatorsReset Switch S3 Memory Maps Front Panel Indicators DS1-DS6Processor Bus Memory Map Processor Bus Memory Map Local Devices Memory Map Address Range Devices Accessed Port Size Detailed I/O Memory Maps 100 BusSwitch Register Memory Map108 110 Memory Maps ECDM0 ECDM1 ECDM2 ECDM3 ADDR/REGISTER Ecdm CSR Register Memory Map Dcam I2C Register Memory Map Dcam I2C Base Address = $C0 default Offset Operating Instructions Offset VMEchip2 Memory Map Sheet 1 Operating Instructions VMEchip2 Memory Map Sheet 2 Global Access BUS Watchdog Timeout Prescaler Adjust Operating Instructions VMEchip2 Memory Map Sheet 3 Operating Instructions VMEchip2 Gcsr Base Address = $FFF40100 VMEchip2 Memory Map Sheet 4 Operating Instructions PCCchip2 Memory Map Printer SEL Interrupt Control Register $FFF42032 Printer Fault Interrupt Control Register $FFF42031Printer PE Interrupt Control Register $FFF42033 Printer Busy Interrupt Control Register $FFF42034 Cirrus Logic CD2401 Serial Port Memory Map Cirrus Logic CD2400 Memory Map Offsets Size AccessBase Address Is $FFF45000 Data Bits Address D31 D16 D15 11 C710 Scsi Memory Map Accesses may be 8-bit or 32-bit, but not 16-bit12. MK48T08 BBRAM, TOD Clock Memory Map Address Range Description Size Bytes 14. TOD Clock Memory Map 13. Bbram Configuration Area Memory MapData Bits Address Function 0460 BBRAM, TOD Clock Memory Map000000470476 VMEbus Memory Map VMEbus Accesses to the Local Peripheral Bus01-W3869B03A 5000 Software Initialization Local Reset OperationMulti-MPU Programming Considerations User’s Manual Data Bus Structure MVME197LE Functional DescriptionMC88110 MPU Functional Description MC88110 Address Data MUX Address Bus Data Bus 256 BusSwitchMezzanine Address Bus Memory Array Flash Memory Battery Backup RAM and ClockOnboard Dram Interfaces VMEbus InterfaceSerial Port Interface Ethernet Interface Printer Interface Peripheral Resources Programmable Tick TimersScsi Interface Scsi Termination Processor Bus Timeout Watchdog TimerLocal Peripheral Bus Timeout Interrupt Sources MVME197LE/D2 Functional Description EIA-232-D Interconnections Table A-1. EIA-232-D Interconnections Pin Signal Signal Name and Description Number Mnemonic Ring Indicator RI is sent by the modem to User’s Manual Figure A-1. Middle-of-the-Road EIA-232-D Configuration Figure A-2. Minimum EIA-232-D Connection Numerics Index IN-2 IN-3 Index