Omega Engineering PCI-DAS1200 Trigger Control/Status Register, Unibip, Input Range, Input Gain

up to 16 channels.

0 = Analog Front-End in Differential Mode. This mode supports up to 8 channels.

UNIBIP Selects offset configuration for the Analog Front-End.

1 = Analog Front-End Unipolar for selected range 0 = Analog Front-End Bipolar for selected range.

The following table summarizes all possible Offset/Range configurations:

UNIBIP	GS1	GS0	Input Range	Input Gain	Measurement
					Resolution
0	0	0	±10 V	1	4.88 mV
0	0	1	± 5 V	2	2.44 mV
0	1	0	±2.5 V	4	1.22 mV
0	1	1	±1.25V	8	610 µV
1	0	0	0-10V	1	2.44 mV
1	0	1	0-5V	2	1.22 mV
1	1	0	0-2.5V	4	610 µV
1	1	1	0-1.25V	8	305 µV

ADPS[1:0] These bits select the ADC Pacer Source. Maximum Internal/External Pacer frequency is 330 kHz.

ADPS1	ADPS0	Pacer Source
0	0	SW Convert
0	1	82C54 Counter/Timer
1	0	External Falling
1	1	External Rising

Note: For ADPS[1:0] = 00 case, SW conversions are initiated via a word write to BADR2 + 0. Data is ‘don't care.’

READ

15	14	13	12		11	10	9	8	7	6	5	4	3	2	1	0
-	EOC	-	-		-	-	-	-	-	-	-	-	-	-	-	-
EOC			Real-time, non-latched status of ADC End-of-Conversion signal.
			1	= ADC DONE
			0	= ADC BUSY

7.3.3 TRIGGER CONTROL/STATUS REGISTER

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