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Omega Engineering PCI-DAS1200 manual Introduction, ORFN3&,$LDJUDP6

Models: PCI-DAS1200

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1.0 INTRODUCTION

1.0 INTRODUCTION

The PCI-DAS1200 and PCI-DAS1200/JR are multifunction measurement and control boards designed to operate in computers with PCI bus accessory slots. The difference between the boards is that the analog ouput functions are not supported by the /JR board. The architecture of the boards is loosely based on the original CIO-DAS16; the standard of ISA bus data acquisition. Much has changed though, and all of it due to improvements in technology. Surface mount packaging technology and custom ASICS allow a far greater range of control over programmable options, such as calibration, triggering, synchronization, and data transfer.

Even the connector has changed. New, denser connectors allow up to 100 signal lines where 37 was once the standard.

The PCI-DAS1200 and PCI-DAS1200/JR are completely plug-and-play. There are no switches or jumpers on the board. All board addresses are set by your computer’s plug-and-play software.

These products are supported by our Universal Library programming library. As an owner, you are entitled to the latest revision of the manual and software. Just call with your current revision numbers handy, and request an update be sent to you.

Gain and Offset Autocal

Gain and Offset Autocal

Burst/Scan

Mux

&

Gain

Analog In

16CH S.E.

8CH DIFF.

Gains = 1, 2, 4, 8

	ADC
	Pacer
	CTR 2	r o l
	CTR 1	n t
	CTR 1	Co
		Co
	Sample
	Counter
	CTR0

12-Bit, 330KHz

Start EOC

EXT PCR

10 MHz

1024 x 12

FIFO

I N T

Burst/Scan

CONTROLLER

FPGA


			12-Bit, 10uS				VDAC 0
DAC			DAC0
			DAC0

Data
Control			12-Bit, 10uS				VDAC 1
			12-Bit, 10uS				VDAC 1
			DAC1
			DAC1

INT

Scan

ADC & DAC

ControlPacer BurstLogic Control

XTRIG Trigger

Control

Decode/Status Int		INT
		INT

Ctl

Bus

Time Base

CLK2

GATE2

OUT2

CLK1

GATE1

OUT1

INT

XTRIG

10MHz

CTR2
CTR1			o l
ADC			o n t r
Index			C
Index
Counter
User
CTR 0
			GATE
			GATE
			CLK
			CLK
			OUT
			OUT

Timing

%ORFN3&,'$'LDJUDP6

Digital I/O

PA (7:0)

Port A

l

Boot

BADR1

o

EEPROM

PCI

BADR2

PB (7:0)

Port B

t r

CONTROLLER

BADR3

n

BADR4

o

C

Interrupt

PC (7:0)

Port C

LOCAL BUS

PCI BUS (5V, 32-BIT, 33MHZ)

1

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Omega Engineering PCI-DAS1200 manual Introduction, ORFN3&,$LDJUDP6

Contents

PCI-DAS1200 Users Guide3.1 CONNECTOR PIN DIAGRAM 4.2 WIRING CONFIGURATIONS6.1 CALIBRATION CONFIGURATION 3.0 HARDWARE CONNECTIONSTable of Contents 1.0 INTRODUCTION ORFN3&,$LDJUDP6LOCAL BUS 3&,%ORFN$LDJUDP6-5PCI BUS 5V, 32-BIT, 33MHZ 2.1.1 Install the InstaCAL software 2.0 INSTALLATION2.1.2 Launching InstaCal 2.1.3 Using InstaCal 2.1.4 Testing the Installation2.2.1 Install the InstaCal software 2.2.3 Using InstaCal2.2.2 Launching InstaCal 2.2 DOS AND/OR WINDOWS2.2.4 TESTING THE INSTALLATION 3.0 HARDWARE CONNECTIONS A nalog Input C h 0 Low / 8 H ighA nalog Input C h 1 Low / 9 H igh A nalog Input C h 2 Low / 10 H igh4.0 ANALOG CONNECTIONS 4.1.1 Single-Ended and Differential InputsSingle-Ended Inputs Single-Ended InputDifferential Inputs Differential InputS in gle -ended input w ith C om m on M ode Voltage D iffe rential Inp ut4.1.2 System Grounds and Isolation Which system do you have?Systems with Common Grounds Systems with Common Mode ground offset VoltagesPCI-DAS1200 and signal source already have isolated grounds Input ConfigurationSmall Common Mode Voltages Large Common Mode VoltagesA /D Board A /D Board4.2.2 Common Ground / Differential Inputs A /D Board A /D Board4.2.3 Common Mode Voltage +/-10V / Single-Ended Inputs 4.2.4 Common Mode Voltage +/-10V / Differential InputsA/D Board A /D BoardA /D Board 4.2.6 Isolated Grounds / Single-Ended Inputs5.0 Programming & Applications 6.0 Self-Calibration of the PCI-DAS1200 6.1 CALIBRATION CONFIGURATIONRefPGA Variable GainD A C A n alo g O u tR e f G ain A d j O ffset A dj7.0 PCI-DAS1200 Register Description 7.2 BADR07.3 BADR1 7.3.1 INTERRUPT / ADC FIFO REGISTERINTE EOAIEEOACL INTCLEOBI ADHFIADNEI ADNE7.3.3 TRIGGER CONTROL/STATUS REGISTER ResolutionUNIBIP Input RangeTS10 TGENSource C0SRCC0SRC XTRIGINDXGT PRTRG7.3.4 CALIBRATION REGISTER DAC ChannelCal Function CSRC2CALEN 7.3.5 DAC CONTROL/STATUS REGISTER Does not apply to PCI-DAS1200/JRDACEN MODE DACnR10 with SEL8800 and SEL7376 bits7.4.1 ADC DATA REGISTER 7.4 BADR27.4.2 ADC FIFO CLEAR REGISTER 7.5 BADR3 7.5.1 ADC PACER CLOCK DATA AND CONTROL REGISTERSDevice Counter #7.5.2 DIGITAL I/O DATA AND CONTROL REGISTERS ADC 8254 CONTROL REGISTERDIO PORT A DATA DIO PORT B DATA DIO PORT C DATADIO CONTROL REGISTER BADR3 +7.5.3 INDEX and USER COUNTER DATA AND CONTROL REGISTERS 8254BCOUNTER 0 DATA-ADC8254B COUNTER 1 DATA - USER COUNTER #5 8254B COUNTER 2 DATA - USER COUNTER #68254B CONTROL REGISTER BADR3 +7.6.1 DAC0 DATA REGISTER 7.6 BADR47.6.2 DAC1 DATA REGISTER 8.0 Electrical Specifications ANALOG OUTPUT Does not apply to PCI-DAS1200/JR Resolution Offset error Gain error Differential nonlinearityConfiguration Number of channels Output High Output Low Input High Input Low Power-up / reset state Interrupts Interrupt enableConfiguration Counter type82C54 82C54AOTHER SPECIFICATIONS Power consumptionOperating temperature range Storage temperature rangeFOR YOUR NOTES EC Declaration of Conformity