Omega Engineering Calen, DAC CONTROL/STATUS REGISTER Does not apply to PCI-DAS1200/JR, DACnR1

Models: PCI-DAS1200

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CALEN

This bit is used to enable Cal Mode.

 

1

= Selected Cal Source, CSRC[2:0], is fed into Analog Channel 0.

 

0

= Analog Channel 0 functions as normal input.

SDI

Serial Data In. This bit is used to set serial address/data stream for the

 

DAC8800 TrimDac and 7376 digital potentiometer. Used in conjunction

 

with SEL8800 and SEL7376 bits.

7.3.5 DAC CONTROL/STATUS REGISTER (Does not apply to PCI-DAS1200/JR)

BADR1 + 8

This register selects the DAC gain/range and update modes. This is a Write-only register.

WRITE

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

-

-

-

-

DAC1R1

DAC1R0

DAC0R1

DAC0R0

MODE

-

-

-

-

-

DACEN

-

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DACEN

MODE

DACnR[1:0]

This bit enables the Analog Out features of the board. 1 = DAC0/1 enabled.

0 = DAC0/1 disabled.

The power-on state of this bit is 0.

This bit determines the analog output mode of operation.

1 = Both DAC0 and DAC1 updated with data written to DAC0 data register. 0 = DACn updated with data written to DACn data register.

The power-on state of this bit is 0.

These bits select the independent gains/ranges for either DAC0 or DAC1. n=0 for DAC0 and n=1 for DAC1.

DACnR1

DACnR0

Range

LSB Size

 

 

 

 

0

0

Bipolar 5V

2.44mV

 

 

 

 

0

1

Bipolar 10V

4.88mV

 

 

 

 

1

0

Unipolar 5V

610uV

 

 

 

 

1

1

Unipolar 10V

1.22mV

 

 

 

 

 

 

 

 

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Omega Engineering manual Calen, DAC CONTROL/STATUS REGISTER Does not apply to PCI-DAS1200/JR, DACEN MODE DACnR10, DACnR0