Gain and Offset Autocal
Burst/Scan 
Mux
&
Gain
Analog In
16CH S.E.
8CH DIFF.
Gains = 1, 2, 4, 8
ADC |
| |
Pacer |
| |
CTR 2 | r o l | |
CTR 1 | n t | |
Co | ||
| ||
Sample |
| |
Counter |
| |
CTR0 |
|
Start EOC
EXT PCR
10 MHz
1024 x 12
FIFO
I N T
Burst/Scan
CONTROLLER
FPGA
INT |
Scan
ADC
&
Pacer
Burst
Control
Logic
XTRIG
Trigger
Control
Decode/Status Int |
| INT |
| ||
|
| |
Ctl |
|
|
Bus
Time Base
CLK2
GATE2
OUT2
CLK1
GATE1
OUT1
INT
XTRIG 
10MHz
CTR2 |
|
| ||
CTR1 | o l |
| ||
ADC | o n t r |
| ||
Index | C |
| ||
|
| |||
Counter |
|
| ||
User |
|
| ||
CTR 0 |
|
| ||
|
|
| GATE | |
|
|
| ||
|
|
| CLK | |
|
|
| ||
|
|
| OUT | |
|
|
| ||
Timing
3&,%ORFN'$'LDJUDP6-5
|
| Digital I/O |
|
|
|
|
|
|
|
| |||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PA (7:0) |
| Port A |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
|
|
| l |
|
|
|
| Boot |
|
|
| BADR1 | |
|
|
| o |
|
|
|
| EEPROM |
| PCI | BADR2 | ||
PB (7:0) |
| Port B | t r |
|
|
|
|
|
| CONTROLLER | BADR3 | ||
|
|
|
|
|
|
| |||||||
|
|
| n |
|
|
|
|
|
| BADR4 | |||
|
|
| C o |
|
|
|
|
|
|
|
| Interrupt | |
PC (7:0) |
| Port C |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCI BUS (5V,
LOCAL BUS
2
