Samsung S3F80P5, S3F80P5X Chapter 3 Addressing Modes , Chapter 4 Control Registers , Chapter 5 Interrupt Structure

Table of Contents (Continued)
Chapter 3 Addressing Modes
Overview .......................................................................................................................................................3-1
Register Addressing Mode (R)............................................................................................................... 3-2
Indirect Register Addressing Mode (IR)................................................................................................. 3-3
Indexed Addressing Mode (X)................................................................................................................ 3-7
Direct Address Mode (DA) .....................................................................................................................3-10
Direct Address MODE (Continued)........................................................................................................ 3-11
Indirect Address Mode (IA).....................................................................................................................3-12
Relative Address Mode (RA).................................................................................................................. 3-13
Immediate Mode (IM) .............................................................................................................................3-14
Chapter 4 Control Registers
Overview .......................................................................................................................................................4-1
Chapter 5 Interrupt Structure
Overview .......................................................................................................................................................5-1
Levels .....................................................................................................................................................5-1
Vectors....................................................................................................................................................5-1
Sources...................................................................................................................................................5-1
Interrupt Types .......................................................................................................................................5-2
Interrupt Vector Addresses.....................................................................................................................5-4
Enable/Disable Interrupt Instructions (EI, DI)......................................................................................... 5-6
System-Level Interrupt Control Registers ..............................................................................................5-6
Interrupt Processing Control Points........................................................................................................5-7
Peripheral Interrupt Control Registers....................................................................................................5-8
System Mode Register (SYM)................................................................................................................ 5-9
Interrupt Mask Register (IMR)................................................................................................................ 5-10
Interrupt Priority Register (IPR).............................................................................................................. 5-11
Interrupt Request Register (IRQ) ...........................................................................................................5-13
Interrupt Pending Function Types ..........................................................................................................5-14
Overview.................................................................................................................................................5-14
Pending Bits Cleared Automatically by Hardware..................................................................................5-14
Pending Bits Cleared by the Service Routine ........................................................................................5-14
Interrupt Source Polling Sequence.........................................................................................................5-15
Interrupt Service Routines...................................................................................................................... 5-15
Generating interrupt Vector Addresses.................................................................................................. 5-16
Nesting of Vectored Interrupts................................................................................................................5-16
Instruction Pointer (IP)............................................................................................................................ 5-16
Fast Interrupt Processing .......................................................................................................................5-16
Fast Interrupt Processing (Continued) ...................................................................................................5-17
Procedure for Initiating Fast Interrupt..................................................................................................... 5-17
Fast Interrupt Service Routine................................................................................................................5-17
Programming Guidelines........................................................................................................................ 5-17
S3F80P5_UM_REV1.00 MICROCONTROLLER v