SUPER MICRO Computer C2SBA+II, C2SBE PNP Configuration, PCI Device Slot#1 PCI Device Slot#4

Chapter 4: BIOS

memory block specified to be cached into a CPU cache area and written into the system memory at the same time. Select Write Protect to prevent data from being written into the memory block specified. Select Write Back to allow the CPU to write data back directly from the buffer to the memory block specified without writing data to the System Memory for fast CPU data processing and operation. The options are Disabled, USWC Caching, Write Through, Write Protect, and Write Back.

PNP Configuration

Access the submenu to make changes to the following settings for PNP (Play & Plug) devices.

PCI Device Slot#1 - PCI Device Slot#4

Access the submenu for each of the settings above to make changes to the following settings:

Option ROM Scan

When enabled, this setting will initialize the device expansion ROM. The options are Enabled and Disabled.

Enable Master

This setting allows you to enable the selected device as the PCI bus master. The options are Enabled and Disabled.

Latency Timer

This setting allows you to set the clock rate for the bus master. A high-priority, high-throughout device may benefit from a greater clock rate. The options are Default, 0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novelle and other Operating Systems, please select the option: other. If a drive fails after the installation of a new software, you might want to change this setting and try again. A different OS requires a different Bus master clock rate.

Onboard PCI IDE/Onboard LAN (PCI IDE: for C2SBA+II/C2SBA+ only)

Option ROM Scan

When enabled, this setting will initialize the device expansion ROM. The options are Enabled and Disabled.

Enable Master

This setting allows you to enable the selected device as the PCI bus master. The options are Enabled and Disabled.

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